From 8c3790d9b745e448eafc0e9be7d0a4ba30014a4b Mon Sep 17 00:00:00 2001 From: Lars Jeppesen Date: Tue, 27 Aug 2024 10:45:34 +0200 Subject: [PATCH] drivers: adc: stm32h5x: Set option register for adc1/channel 0 The STM32H5x adc has a special option register that needs to be set when using channel 0 on adc1. fixes: #77618 Signed-off-by: Lars Jeppesen --- drivers/adc/adc_stm32.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/adc/adc_stm32.c b/drivers/adc/adc_stm32.c index b670b5506e3..6c5fc585a67 100644 --- a/drivers/adc/adc_stm32.c +++ b/drivers/adc/adc_stm32.c @@ -1308,6 +1308,11 @@ static int adc_stm32_sampling_time_setup(const struct device *dev, uint8_t id, static int adc_stm32_channel_setup(const struct device *dev, const struct adc_channel_cfg *channel_cfg) { +#ifdef CONFIG_SOC_SERIES_STM32H5X + const struct adc_stm32_cfg *config = (const struct adc_stm32_cfg *)dev->config; + ADC_TypeDef *adc = config->base; +#endif + if (channel_cfg->differential) { LOG_ERR("Differential channels are not supported"); return -EINVAL; @@ -1329,6 +1334,14 @@ static int adc_stm32_channel_setup(const struct device *dev, return -EINVAL; } +#ifdef CONFIG_SOC_SERIES_STM32H5X + if (adc == ADC1) { + if (channel_cfg->channel_id == 0) { + LL_ADC_EnableChannel0_GPIO(adc); + } + } +#endif + LOG_DBG("Channel setup succeeded!"); return 0;