drivers/disk: sdmmc_stm32: Convert driver to IT driven mode for r/w

Add IT driven read/write access.
2 new semaphores are added to protect IT driven procedures.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2021-10-11 17:03:45 +02:00 committed by Christopher Friedt
commit 8bd5549021

View file

@ -22,7 +22,12 @@ LOG_MODULE_REGISTER(stm32_sdmmc, CONFIG_SDMMC_LOG_LEVEL);
#define MMC_TypeDef SDMMC_TypeDef
#endif
typedef void (*irq_config_func_t)(const struct device *dev);
struct stm32_sdmmc_priv {
irq_config_func_t irq_config;
struct k_sem thread_lock;
struct k_sem sync;
SD_HandleTypeDef hsd;
int status;
struct k_work work;
@ -46,6 +51,43 @@ struct stm32_sdmmc_priv {
} pinctrl;
};
static void stm32_sdmmc_isr(const struct device *dev)
{
struct stm32_sdmmc_priv *priv = dev->data;
HAL_SD_IRQHandler(&priv->hsd);
}
void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd)
{
struct stm32_sdmmc_priv *priv =
CONTAINER_OF(hsd, struct stm32_sdmmc_priv, hsd);
priv->status = hsd->ErrorCode;
k_sem_give(&priv->sync);
}
void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd)
{
struct stm32_sdmmc_priv *priv =
CONTAINER_OF(hsd, struct stm32_sdmmc_priv, hsd);
priv->status = hsd->ErrorCode;
k_sem_give(&priv->sync);
}
void HAL_SD_ErrorCallback(SD_HandleTypeDef *hsd)
{
struct stm32_sdmmc_priv *priv =
CONTAINER_OF(hsd, struct stm32_sdmmc_priv, hsd);
priv->status = hsd->ErrorCode;
k_sem_give(&priv->sync);
}
static int stm32_sdmmc_clock_enable(struct stm32_sdmmc_priv *priv)
{
const struct device *clock;
@ -135,19 +177,32 @@ static int stm32_sdmmc_access_read(struct disk_info *disk, uint8_t *data_buf,
{
const struct device *dev = disk->dev;
struct stm32_sdmmc_priv *priv = dev->data;
int err;
int err = 0;
err = HAL_SD_ReadBlocks(&priv->hsd, data_buf, start_sector,
num_sector, 30000);
k_sem_take(&priv->thread_lock, K_FOREVER);
err = HAL_SD_ReadBlocks_IT(&priv->hsd, data_buf, start_sector,
num_sector);
if (err != HAL_OK) {
LOG_ERR("sd read block failed %d", err);
return -EIO;
err = -EIO;
goto end;
}
while (HAL_SD_GetCardState(&priv->hsd) != HAL_SD_CARD_TRANSFER)
;
k_sem_take(&priv->sync, K_FOREVER);
return 0;
if (priv->status != DISK_STATUS_OK) {
LOG_ERR("sd read error %d", priv->status);
err = -EIO;
goto end;
}
while (HAL_SD_GetCardState(&priv->hsd) != HAL_SD_CARD_TRANSFER) {
}
end:
k_sem_give(&priv->thread_lock);
return err;
}
static int stm32_sdmmc_access_write(struct disk_info *disk,
@ -156,18 +211,32 @@ static int stm32_sdmmc_access_write(struct disk_info *disk,
{
const struct device *dev = disk->dev;
struct stm32_sdmmc_priv *priv = dev->data;
int err;
int err = 0;
err = HAL_SD_WriteBlocks(&priv->hsd, (uint8_t *)data_buf, start_sector,
num_sector, 30000);
k_sem_take(&priv->thread_lock, K_FOREVER);
err = HAL_SD_WriteBlocks_IT(&priv->hsd, (uint8_t *)data_buf, start_sector,
num_sector);
if (err != HAL_OK) {
LOG_ERR("sd write block failed %d", err);
return -EIO;
err = -EIO;
goto end;
}
while (HAL_SD_GetCardState(&priv->hsd) != HAL_SD_CARD_TRANSFER)
;
return 0;
k_sem_take(&priv->sync, K_FOREVER);
if (priv->status != DISK_STATUS_OK) {
LOG_ERR("sd write error %d", priv->status);
err = -EIO;
goto end;
}
while (HAL_SD_GetCardState(&priv->hsd) != HAL_SD_CARD_TRANSFER) {
}
end:
k_sem_give(&priv->thread_lock);
return err;
}
static int stm32_sdmmc_access_ioctl(struct disk_info *disk, uint8_t cmd,
@ -369,6 +438,12 @@ static int disk_stm32_sdmmc_init(const struct device *dev)
return err;
}
priv->irq_config(dev);
/* Initialize semaphores */
k_sem_init(&priv->thread_lock, 1, 1);
k_sem_init(&priv->sync, 0, 1);
err = stm32_sdmmc_card_detect_init(priv);
if (err) {
return err;
@ -404,7 +479,17 @@ err_card_detect:
static const struct soc_gpio_pinctrl sdmmc_pins_1[] =
ST_STM32_DT_INST_PINCTRL(0, 0);
static void stm32_sdmmc_irq_config_func(const struct device *dev)
{
IRQ_CONNECT(DT_INST_IRQN(0),
DT_INST_IRQ(0, priority),
stm32_sdmmc_isr, DEVICE_DT_INST_GET(0),
0);
irq_enable(DT_INST_IRQN(0));
}
static struct stm32_sdmmc_priv stm32_sdmmc_priv_1 = {
.irq_config = stm32_sdmmc_irq_config_func,
.hsd = {
.Instance = (MMC_TypeDef *)DT_INST_REG_ADDR(0),
},