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soc: rt10xx: Enable USB2 controller clock

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Enable USB2 controller clock on RT10xx SOC init, if nodelabel has
status="okay"

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2022-02-24 12:40:02 -06:00 • committed by Marti Bolivar
commit 8b7f23da28
2 changed files with 12 additions and 3 deletions
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1
dts/arm/nxp/nxp_rt.dtsi
View file

@ -614,6 +614,7 @@
reg = <0x402E0200 0x200>;
interrupts = <112 1>;
interrupt-names = "usb_otg";
clocks = <&sysclk>;
num-bidir-endpoints = <8>;
maximum-speed = "full-speed";
status = "disabled";

14
soc/arm/nxp_imx/rt/soc_rt10xx.c
View file

@ -164,14 +164,22 @@ static ALWAYS_INLINE void clock_init(void)
CLOCK_SetDiv(kCLOCK_LcdifDiv, 1);
#endif
#if CONFIG_USB_DC_NXP_EHCI
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usb1), okay) && CONFIG_USB_DC_NXP_EHCI
CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usb480M,
DT_PROP_BY_PHANDLE(DT_INST(0, nxp_mcux_usbd), clocks, clock_frequency));
DT_PROP_BY_PHANDLE(DT_NODELABEL(usb1), clocks, clock_frequency));
CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M,
DT_PROP_BY_PHANDLE(DT_INST(0, nxp_mcux_usbd), clocks, clock_frequency));
DT_PROP_BY_PHANDLE(DT_NODELABEL(usb1), clocks, clock_frequency));
USB_EhciPhyInit(kUSB_ControllerEhci0, CPU_XTAL_CLK_HZ, &usbPhyConfig);
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usb2), okay) && CONFIG_USB_DC_NXP_EHCI
CLOCK_EnableUsbhs1PhyPllClock(kCLOCK_Usb480M,
DT_PROP_BY_PHANDLE(DT_NODELABEL(usb2), clocks, clock_frequency));
CLOCK_EnableUsbhs1Clock(kCLOCK_Usb480M,
DT_PROP_BY_PHANDLE(DT_NODELABEL(usb2), clocks, clock_frequency));
USB_EhciPhyInit(kUSB_ControllerEhci1, CPU_XTAL_CLK_HZ, &usbPhyConfig);
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_DISK_DRIVER_SDMMC
/* Configure USDHC clock source and divider */
CLOCK_InitSysPfd(kCLOCK_Pfd0, 24U);