drivers: can: Rework can_configure API
The previous API can't change the sampling-point and only allowed bitrates that fit the time segments. The new API allows for shifting the sampling-point and adjusts the number of time quantum in a bit to all more possible bitrates. The functions to calculate the timings are moved to the can_common file. They can be used for all drivers. Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
This commit is contained in:
Alexander Wachter
Carles Cufí
parent
caa35d1a3a
commit
8b6c1bd4b7
19 changed files with 852 additions and 162 deletions
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@ -290,69 +290,14 @@ static int can_leave_sleep_mode(CAN_TypeDef *can)
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return 0;
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}
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int can_stm32_runtime_configure(const struct device *dev, enum can_mode mode,
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uint32_t bitrate)
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int can_stm32_set_mode(const struct device *dev, enum can_mode mode)
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{
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CAN_HandleTypeDef hcan;
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const struct can_stm32_config *cfg = DEV_CFG(dev);
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CAN_TypeDef *can = cfg->can;
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struct can_stm32_data *data = DEV_DATA(dev);
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const struct device *clock;
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uint32_t clock_rate;
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uint32_t prescaler;
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uint32_t reg_mode;
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uint32_t ts1;
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uint32_t ts2;
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uint32_t sjw;
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int ret;
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clock = device_get_binding(STM32_CLOCK_CONTROL_NAME);
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__ASSERT_NO_MSG(clock);
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hcan.Instance = can;
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ret = clock_control_get_rate(clock, (clock_control_subsys_t *) &cfg->pclken,
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&clock_rate);
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if (ret != 0) {
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LOG_ERR("Failed call clock_control_get_rate: return [%d]", ret);
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return -EIO;
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}
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if (!bitrate) {
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bitrate = cfg->bus_speed;
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}
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prescaler = clock_rate / (BIT_SEG_LENGTH(cfg) * bitrate);
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if (prescaler == 0U || prescaler > 1024) {
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LOG_ERR("HAL_CAN_Init failed: prescaler > max (%d > 1024)",
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prescaler);
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return -EINVAL;
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}
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if (clock_rate % (BIT_SEG_LENGTH(cfg) * bitrate)) {
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LOG_ERR("Prescaler is not a natural number! "
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"prescaler = clock_rate / ((PROP_SEG1 + SEG2 + 1)"
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" * bus_speed); "
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"prescaler = %d / ((%d + %d + 1) * %d)",
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clock_rate,
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cfg->prop_ts1,
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cfg->ts2,
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bitrate);
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}
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__ASSERT(cfg->sjw >= 1, "SJW minimum is 1");
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__ASSERT(cfg->sjw <= 4, "SJW maximum is 4");
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__ASSERT(cfg->prop_ts1 >= 1, "PROP_TS1 minimum is 1");
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__ASSERT(cfg->prop_ts1 <= 16, "PROP_TS1 maximum is 16");
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__ASSERT(cfg->ts2 >= 1, "TS2 minimum is 1");
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__ASSERT(cfg->ts2 <= 8, "TS2 maximum is 8");
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ts1 = ((cfg->prop_ts1 - 1) & 0x0F) << CAN_BTR_TS1_Pos;
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ts2 = ((cfg->ts2 - 1) & 0x07) << CAN_BTR_TS2_Pos;
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sjw = ((cfg->sjw - 1) & 0x07) << CAN_BTR_SJW_Pos;
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reg_mode = (mode == CAN_NORMAL_MODE) ? 0U :
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(mode == CAN_LOOPBACK_MODE) ? CAN_BTR_LBKM :
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(mode == CAN_SILENT_MODE) ? CAN_BTR_SILM :
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CAN_BTR_LBKM | CAN_BTR_SILM;
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LOG_DBG("Set mode %d", mode);
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k_mutex_lock(&data->inst_mutex, K_FOREVER);
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ret = can_enter_init_mode(can);
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@ -361,26 +306,97 @@ int can_stm32_runtime_configure(const struct device *dev, enum can_mode mode,
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goto done;
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}
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can->BTR = reg_mode | sjw | ts1 | ts2 | (prescaler - 1U);
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switch (mode) {
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case CAN_NORMAL_MODE:
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can->BTR &= ~(CAN_BTR_LBKM | CAN_BTR_SILM);
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break;
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case CAN_LOOPBACK_MODE:
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can->BTR &= ~(CAN_BTR_SILM);
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can->BTR |= CAN_BTR_LBKM;
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break;
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case CAN_SILENT_MODE:
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can->BTR &= ~(CAN_BTR_LBKM);
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can->BTR |= CAN_BTR_SILM;
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break;
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case CAN_SILENT_LOOPBACK_MODE:
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can->BTR |= CAN_BTR_LBKM | CAN_BTR_SILM;
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break;
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default:
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break;
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}
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done:
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ret = can_leave_init_mode(can);
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if (ret) {
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LOG_ERR("Failed to leave init mode");
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}
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k_mutex_unlock(&data->inst_mutex);
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return ret;
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}
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int can_stm32_set_timing(const struct device *dev,
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const struct can_timing *timing,
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const struct can_timing *timing_data)
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{
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const struct can_stm32_config *cfg = DEV_CFG(dev);
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CAN_TypeDef *can = cfg->can;
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struct can_stm32_data *data = DEV_DATA(dev);
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int ret = -EIO;
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ARG_UNUSED(timing_data);
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k_mutex_lock(&data->inst_mutex, K_FOREVER);
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ret = can_enter_init_mode(can);
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if (ret) {
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LOG_ERR("Failed to enter init mode");
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goto done;
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}
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can->BTR &= ~(CAN_BTR_BRP_Msk | CAN_BTR_TS1_Msk |
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CAN_BTR_TS2_Msk | CAN_BTR_SJW_Msk);
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can->BTR |= (((timing->phase_seg1 - 1) & 0x0F) << CAN_BTR_TS1_Pos) |
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(((timing->phase_seg2 - 1) & 0x07) << CAN_BTR_TS2_Pos) |
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(((timing->sjw - 1) & 0x07) << CAN_BTR_SJW_Pos);
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ret = can_leave_init_mode(can);
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if (ret) {
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LOG_ERR("Failed to leave init mode");
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goto done;
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} else {
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ret = 0;
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}
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LOG_DBG("Runtime configure of %s done", dev->name);
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ret = 0;
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done:
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k_mutex_unlock(&data->inst_mutex);
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return ret;
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}
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int can_stm32_get_core_clock(const struct device *dev, uint32_t *rate)
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{
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const struct can_stm32_config *cfg = DEV_CFG(dev);
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const struct device *clock;
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int ret;
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clock = device_get_binding(STM32_CLOCK_CONTROL_NAME);
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__ASSERT_NO_MSG(clock);
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ret = clock_control_get_rate(clock,
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(clock_control_subsys_t *) &cfg->pclken,
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rate);
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if (ret != 0) {
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LOG_ERR("Failed call clock_control_get_rate: return [%d]", ret);
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return -EIO;
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}
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return 0;
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}
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static int can_stm32_init(const struct device *dev)
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{
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const struct can_stm32_config *cfg = DEV_CFG(dev);
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struct can_stm32_data *data = DEV_DATA(dev);
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CAN_TypeDef *can = cfg->can;
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struct can_timing timing;
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(can2), okay)
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CAN_TypeDef *master_can = cfg->master_can;
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#endif
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@ -445,8 +461,36 @@ static int can_stm32_init(const struct device *dev)
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#ifdef CONFIG_CAN_AUTO_BUS_OFF_RECOVERY
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can->MCR |= CAN_MCR_ABOM;
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#endif
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timing.sjw = cfg->sjw;
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if (cfg->sample_point) {
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ret = can_calc_timing(dev, &timing, cfg->bus_speed,
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cfg->sample_point);
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if (ret == -EINVAL) {
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LOG_ERR("Can't find timing for given param");
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return -EIO;
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}
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LOG_DBG("Presc: %d, TS1: %d, TS2: %d",
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timing.prescaler, timing.phase_seg1, timing.phase_seg2);
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LOG_DBG("Sample-point err : %d", ret);
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} else if (cfg->prop_ts1) {
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timing.prop_seg = 0;
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timing.phase_seg1 = cfg->prop_ts1;
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timing.phase_seg2 = cfg->ts2;
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ret = can_calc_prescaler(dev, &timing, cfg->bus_speed);
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if (ret) {
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LOG_WRN("Bitrate error: %d", ret);
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}
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} else {
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LOG_ERR("Timing not configured");
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return -EINVAL;
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}
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ret = can_stm32_runtime_configure(dev, CAN_NORMAL_MODE, 0);
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ret = can_stm32_set_timing(dev, &timing, NULL);
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if (ret) {
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return ret;
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}
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ret = can_stm32_set_mode(dev, CAN_NORMAL_MODE);
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if (ret) {
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return ret;
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}
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@ -1037,7 +1081,8 @@ void can_stm32_detach(const struct device *dev, int filter_nr)
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}
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static const struct can_driver_api can_api_funcs = {
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.configure = can_stm32_runtime_configure,
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.set_mode = can_stm32_set_mode,
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.set_timing = can_stm32_set_timing,
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.send = can_stm32_send,
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.attach_isr = can_stm32_attach_isr,
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.detach = can_stm32_detach,
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@ -1045,7 +1090,22 @@ static const struct can_driver_api can_api_funcs = {
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#ifndef CONFIG_CAN_AUTO_BUS_OFF_RECOVERY
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.recover = can_stm32_recover,
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#endif
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.register_state_change_isr = can_stm32_register_state_change_isr
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.register_state_change_isr = can_stm32_register_state_change_isr,
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.get_core_clock = can_stm32_get_core_clock,
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.timing_min = {
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.sjw = 0x1,
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.prop_seg = 0x00,
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.phase_seg1 = 0x01,
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.phase_seg2 = 0x01,
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.prescaler = 0x01
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},
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.timing_max = {
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.sjw = 0x07,
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.prop_seg = 0x00,
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.phase_seg1 = 0x0F,
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.phase_seg2 = 0x07,
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.prescaler = 0x400
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}
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};
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#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(can1), st_stm32_can, okay)
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@ -1059,10 +1119,16 @@ static const struct can_stm32_config can_stm32_cfg_1 = {
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.can = (CAN_TypeDef *)DT_REG_ADDR(DT_NODELABEL(can1)),
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.master_can = (CAN_TypeDef *)DT_REG_ADDR(DT_NODELABEL(can1)),
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.bus_speed = DT_PROP(DT_NODELABEL(can1), bus_speed),
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#if DT_PROP(DT_NODELABEL(can1), sample_point) > 0
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.sample_point = DT_PROP(DT_NODELABEL(can1), sample_point),
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#endif
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.sjw = DT_PROP(DT_NODELABEL(can1), sjw),
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#if DT_PROP(DT_NODELABEL(can1), phase_seg1) > 0 && \
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DT_PROP(DT_NODELABEL(can1), phase_seg2) > 0
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.prop_ts1 = DT_PROP(DT_NODELABEL(can1), prop_seg) +
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DT_PROP(DT_NODELABEL(can1), phase_seg1),
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DT_PROP(DT_NODELABEL(can1), phase_seg1),
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.ts2 = DT_PROP(DT_NODELABEL(can1), phase_seg2),
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#endif
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.pclken = {
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.enr = DT_CLOCKS_CELL(DT_NODELABEL(can1), bits),
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.bus = DT_CLOCKS_CELL(DT_NODELABEL(can1), bus),
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@ -1154,10 +1220,16 @@ static const struct can_stm32_config can_stm32_cfg_2 = {
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.master_can = (CAN_TypeDef *)DT_PROP(DT_NODELABEL(can2),
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master_can_reg),
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.bus_speed = DT_PROP(DT_NODELABEL(can2), bus_speed),
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#if DT_PROP(DT_NODELABEL(can2), sample_point) > 0
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.sample_point = DT_PROP(DT_NODELABEL(can2), sample_point),
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#endif
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.sjw = DT_PROP(DT_NODELABEL(can2), sjw),
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#if DT_PROP(DT_NODELABEL(can2), phase_seg1) > 0 && \
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DT_PROP(DT_NODELABEL(can2), phase_seg2) > 0
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.prop_ts1 = DT_PROP(DT_NODELABEL(can2), prop_seg) +
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DT_PROP(DT_NODELABEL(can2), phase_seg1),
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DT_PROP(DT_NODELABEL(can2), phase_seg1),
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.ts2 = DT_PROP(DT_NODELABEL(can2), phase_seg2),
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#endif
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.pclken = {
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.enr = DT_CLOCKS_CELL(DT_NODELABEL(can2), bits),
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.bus = DT_CLOCKS_CELL(DT_NODELABEL(can2), bus),
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