michaelh/zephyr
1
0
Fork 0
Code Releases Activity

arc: Don't need CONFIG_NUM_REGULAR_IRQ_PRIO_LEVELS

Browse source 
We can derive NUM_REGULAR_IRQ_PRIO_LEVELS by subtracting 1
from CONFIG_IRQ_PRIO_LEVELS if FIRQ is present (which is currently
always the case). If FIRQ is not present, the value will be equal
to CONFIG_IRQ_PRIO_LEVELS since all interrupts will be regular.

Change-Id: Ibefc939e3771bf0adf712127db0d36cb49bf732b
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
This commit is contained in:
Chuck Jordan 2016-10-28 15:27:11 -07:00 • committed by Anas Nashif
commit 8b1958a36a
6 changed files with 15 additions and 40 deletions
Download patch file Download diff file Expand all files Collapse all files

16
arch/arc/Kconfig
View file

@ -84,22 +84,6 @@ config NUM_IRQ_PRIO_LEVELS
The BSP must provide a valid default for proper operation. The BSP must provide a valid default for proper operation.
config NUM_REGULAR_IRQ_PRIO_LEVELS
int
prompt "Number of supported regular interrupt priority levels"
range 1 16
help
This represents the number of Regular Interrupt priorities, which
does NOT include the Fast (FIRQ) priority.
The Regular Interrupt priorities available will be
(NUM_IRQ_PRIO_LEVELS - NUM_REGULAR_IRQ_PRIO_LEVELS) to
(NUM_REGULAR_IRQ_PRIO_LEVELS - 1).
The maximum value is NUM_IRQ_PRIO_LEVELS.
The BSP must provide a valid default for proper operation.
config NUM_IRQS config NUM_IRQS
int int
prompt "Upper limit of interrupt numbers/IDs used" prompt "Upper limit of interrupt numbers/IDs used"

20
arch/arc/core/regular_irq.S
View file

@ -39,11 +39,21 @@ GTEXT(_rirq_common_interrupt_swap)
GTEXT(_is_next_thread_current) GTEXT(_is_next_thread_current)
#endif #endif
#if CONFIG_NUM_IRQ_PRIO_LEVELS > 2 #if 0 /* TODO: when FIRQ is not present, all would be regular */
#error "NUM_IRQ_PRIO_LEVELS>2 is not supported." #define NUM_REGULAR_IRQ_PRIO_LEVELS CONFIG_NUM_IRQ_PRIO_LEVELS
#else
#define NUM_REGULAR_IRQ_PRIO_LEVELS (CONFIG_NUM_IRQ_PRIO_LEVELS-1)
#endif
/* note: the above define assumes that prio 0 IRQ is for FIRQ, and
* that all others are regular interrupts.
* TODO: Revist this if FIRQ becomes configurable.
*/
#if NUM_REGULAR_IRQ_PRIO_LEVELS > 1
#error "nested regular interrupts are not supported."
/* /*
* Nesting of Regularing interrupts is not yet supported. * Nesting of Regularing interrupts is not yet supported.
* If your SOC supports more than 2, set this value to 2. * Set CONFIG_NUM_IRQ_PRIO_LEVELS to 2 even if SOC supports more.
*/ */
#endif #endif
@ -71,7 +81,7 @@ SECTION_FUNC(TEXT, _rirq_enter)
kflag r2 kflag r2
#endif #endif
ld_s r2, [r1, __tNANO_current_OFFSET] ld_s r2, [r1, __tNANO_current_OFFSET]
#if CONFIG_NUM_REGULAR_IRQ_PRIO_LEVELS == 1 #if NUM_REGULAR_IRQ_PRIO_LEVELS == 1
st sp, [r2, __tTCS_preempReg_OFFSET + __tPreempt_sp_OFFSET] st sp, [r2, __tTCS_preempReg_OFFSET + __tPreempt_sp_OFFSET]
ld sp, [r1, __tNANO_rirq_sp_OFFSET] ld sp, [r1, __tNANO_rirq_sp_OFFSET]
#else #else
@ -92,7 +102,7 @@ SECTION_FUNC(TEXT, _rirq_exit)
mov r1, _nanokernel mov r1, _nanokernel
ld_s r2, [r1, __tNANO_current_OFFSET] ld_s r2, [r1, __tNANO_current_OFFSET]
#if CONFIG_NUM_REGULAR_IRQ_PRIO_LEVELS > 1 #if NUM_REGULAR_IRQ_PRIO_LEVELS > 1
/* check if we're a nested interrupt: if so, let the interrupted interrupt /* check if we're a nested interrupt: if so, let the interrupted interrupt
* handle the reschedule */ * handle the reschedule */

5
arch/arc/soc/em11d/Kconfig.defconfig
View file

@ -27,11 +27,6 @@ config NUM_IRQ_PRIO_LEVELS
# so this must be 2 for now. # so this must be 2 for now.
default 2 default 2
config NUM_REGULAR_IRQ_PRIO_LEVELS
# This processor supports 3 Regular Interrupt priority level (1-3).
# TODO: But regular irq nesting is not implemented -- so use 1.
default 1
config NUM_IRQS config NUM_IRQS
# must be > the highest interrupt number used # must be > the highest interrupt number used
default 36 default 36

5
arch/arc/soc/em7d/Kconfig.defconfig
View file

@ -27,11 +27,6 @@ config NUM_IRQ_PRIO_LEVELS
# so this must be 2 for now. # so this must be 2 for now.
default 2 default 2
config NUM_REGULAR_IRQ_PRIO_LEVELS
# This processor supports 3 Regular Interrupt priority level (1-3).
# TODO: But regular irq nesting is not implemented -- so use 1.
default 1
config NUM_IRQS config NUM_IRQS
# must be > the highest interrupt number used # must be > the highest interrupt number used
default 36 default 36

5
arch/arc/soc/em9d/Kconfig.defconfig
View file

@ -27,11 +27,6 @@ config NUM_IRQ_PRIO_LEVELS
# so this must be 2 for now. # so this must be 2 for now.
default 2 default 2
config NUM_REGULAR_IRQ_PRIO_LEVELS
# This processor supports 3 Regular Interrupt priority level (1-3).
# TODO: But regular irq nesting is not implemented -- so use 1.
default 1
config NUM_IRQS config NUM_IRQS
# must be > the highest interrupt number used # must be > the highest interrupt number used
default 36 default 36

4
arch/arc/soc/quark_se_c1000_ss/Kconfig.defconfig
View file

@ -25,10 +25,6 @@ config NUM_IRQ_PRIO_LEVELS
# 0 for Fast Interrupts (FIRQs) and 1 for Regular Interrupts (IRQs). # 0 for Fast Interrupts (FIRQs) and 1 for Regular Interrupts (IRQs).
default 2 default 2
config NUM_REGULAR_IRQ_PRIO_LEVELS
# This processor supports only 1 Regular Interrupt priority level (1).
default 1
config NUM_IRQS config NUM_IRQS
# must be > the highest interrupt number used # must be > the highest interrupt number used
default 68 default 68