quark_se: Save/restore debug registers.
In order to set breakpoints after waking up from sleep, it is needed to save DR0/DR1/DR2/DR3 and DR6/DR7. As DR4/DR5 are reserved or mapped to DR6/DR7, they are not saved. Patch2 : Added compile time checks for debug build or soc_watch build for Intel Energy analysis. Patch3 : Avoid clobbering of edx. JIRA: ZEP-1681 Change-Id: I62fbedca16953d57196420ecae4fb93c785bb4a5 Signed-off-by: Sarath R Nair <sarath.nandu.ramachandran.nair@intel.com>
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@ -21,6 +21,21 @@ SECTION_FUNC(TEXT, save_cpu_context)
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pushf /* save flags */
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pusha /* save GPRs */
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#if defined (CONFIG_DEBUG) || defined (CONFIG_SOC_WATCH)
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/* save the debug registers */
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movl %dr0, %edx
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pushl %edx
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movl %dr1, %edx
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pushl %edx
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movl %dr2, %edx
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pushl %edx
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movl %dr3, %edx
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pushl %edx
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movl %dr6, %edx
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pushl %edx
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movl %dr7, %edx
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pushl %edx
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#endif
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movl %esp, _pm_save_esp /* save stack ptr */
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sidtl _pm_save_idtr /* save idtr */
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sgdtl _pm_save_gdtr /* save gdtr */
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@ -32,6 +47,21 @@ SECTION_FUNC(TEXT, _power_restore_cpu_context)
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lgdtl _pm_save_gdtr /* restore gdtr */
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lidtl _pm_save_idtr /* restore idtr */
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movl _pm_save_esp, %esp /* restore saved stack ptr */
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#if defined (CONFIG_DEBUG) || defined (CONFIG_SOC_WATCH)
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/* restore the debug registers */
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popl %edx
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movl %edx, %dr7
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popl %edx
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movl %edx, %dr6
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popl %edx
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movl %edx, %dr3
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popl %edx
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movl %edx, %dr2
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popl %edx
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movl %edx, %dr1
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popl %edx
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movl %edx, %dr0
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#endif
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popa /* restore saved GPRs */
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popf /* restore saved flags */
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