llext: add support for SLID-based linking

This commit introduces support for an alternate linking method in the
LLEXT subsystem, called "SLID" (short for Symbol Link Identifier),
enabled by the CONFIG_LLEXT_EXPORT_BUILTINS_BY_SLID Kconfig option.

SLID-based linking uses a unique identifier (integer) to identify
exported symbols, instead of using the symbol name as done currently.
This approach provides several benefits:
 * linking is faster because the comparison operation to determine
   whether we found the correct symbol in the export table is now an
   integer compare, instead of a string compare
 * binary size is reduced as symbol names can be dropped from the binary
 * confidentiality is improved as a side-effect, as symbol names are no
   longer present in the binary

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>

soc/espressif/esp32/default.ld

@@ -152,6 +152,10 @@ SECTIONS
 
   #include <zephyr/linker/rel-sections.ld>
 
+#ifdef CONFIG_LLEXT
+  #include <zephyr/linker/llext-sections.ld>
+#endif
+
   /* --- RTC BEGIN --- */
 
   /* RTC fast memory holds RTC wake stub code,

soc/espressif/esp32/default_appcpu.ld

@@ -55,6 +55,10 @@ SECTIONS
 {
 #include <zephyr/linker/rel-sections.ld>
 
+#ifdef CONFIG_LLEXT
+#include <zephyr/linker/llext-sections.ld>
+#endif
+
   _image_iram_start = LOADADDR(.iram0.vectors);
   _image_iram_size = LOADADDR(_TEXT_SECTION_NAME) + SIZEOF(_TEXT_SECTION_NAME) - _image_iram_start;
   _image_iram_vaddr = ADDR(.iram0.vectors);

soc/espressif/esp32c3/default.ld

@@ -129,6 +129,10 @@ SECTIONS
 
   #include <zephyr/linker/rel-sections.ld>
 
+#ifdef CONFIG_LLEXT
+  #include <zephyr/linker/llext-sections.ld>
+#endif
+
   /* --- START OF RTC --- */
 
   .rtc.text :

soc/espressif/esp32s2/default.ld

@@ -136,6 +136,10 @@ SECTIONS
 /* Virtual non-loadable sections */
 #include <zephyr/linker/rel-sections.ld>
 
+#ifdef CONFIG_LLEXT
+#include <zephyr/linker/llext-sections.ld>
+#endif
+
   /* --- START OF RTC --- */
 
   /* RTC fast memory holds RTC wake stub code,

soc/espressif/esp32s3/default.ld

@@ -135,6 +135,10 @@ SECTIONS
 /* Virtual non-loadable sections */
 #include <zephyr/linker/rel-sections.ld>
 
+#ifdef CONFIG_LLEXT
+#include <zephyr/linker/llext-sections.ld>
+#endif
+
   /* --- START OF RTC --- */
 
   /* RTC fast memory holds RTC wake stub code */

soc/espressif/esp32s3/default_appcpu.ld

@@ -38,6 +38,10 @@ SECTIONS
 {
   #include <zephyr/linker/rel-sections.ld>
 
+  #ifdef CONFIG_LLEXT
+  #include <zephyr/linker/llext-sections.ld>
+  #endif
+
    /* Send .iram0 code to iram */
   .iram0.vectors : ALIGN(4)
   {