boards: arm: bl5340_dvk: Update clock error
The 32KHz crystal used is a tuning fork crystal which can have a larger clock drift over temperature than an AT cut crystal, therefore the LFXO clock source error rate needs updating to account for this possible drift over temperature. Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
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1 changed files with 8 additions and 2 deletions
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@ -13,12 +13,18 @@ CONFIG_HW_STACK_PROTECTION=y
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# Enable TrustZone-M
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# Enable TrustZone-M
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CONFIG_ARM_TRUSTZONE_M=y
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CONFIG_ARM_TRUSTZONE_M=y
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# enable GPIO
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# Enable GPIO
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CONFIG_GPIO=y
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CONFIG_GPIO=y
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# Enable uart driver
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# Enable uart driver
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CONFIG_SERIAL=y
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CONFIG_SERIAL=y
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# enable console
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# Enable console
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CONFIG_CONSOLE=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# Setup clocks
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CONFIG_CLOCK_CONTROL_NRF_K32SRC_250PPM=y
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CONFIG_SOC_LFXO_CAP_INT_7PF=y
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CONFIG_SOC_HFXO_CAP_INTERNAL=y
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CONFIG_SOC_HFXO_CAP_INT_VALUE_X2=27
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