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arm: Use new SRAM and flash Kconfig options

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The configuration of SRAM and flash options are no longer hardcoded in the
platform's linker script file, but are instead defined in the platform
configuration file.

Change-Id: I557a8228080d607f6add5f86b9b2509ed3fd31ce
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
This commit is contained in:
Peter Mitsis 2015-07-24 12:00:02 -04:00 • committed by Anas Nashif
commit 89e922243b
7 changed files with 14 additions and 27 deletions
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3
arch/arm/core/cortex_m/vector_table.h
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@ -50,9 +50,10 @@ No other symbol has the same format, so they are easy to spot.
#include <board.h>
#include <toolchain.h>
#include <sections.h>
#include <misc/util.h>
/* location of MSP and PSP upon boot: at the end of SRAM */
.equ __CORTEXM_BOOT_MSP, (0x20000000 + SRAM_SIZE - 8)
.equ __CORTEXM_BOOT_MSP, (CONFIG_SRAM_BASE_ADDRESS + KB(CONFIG_SRAM_SIZE) - 8)
.equ __CORTEXM_BOOT_PSP, (__CORTEXM_BOOT_MSP - 0x100)
GTEXT(__start)

10
arch/arm/platforms/fsl_frdm_k64f/README.txt Normal file
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@ -0,0 +1,10 @@
Notes on the FSL FRDM K64F SRAM base address and size
Although the K64F CPU has 64 kB of SRAM at 0x1FFF0000 (code space), it is not
used by the FSL FRDM K64F platform. Only the 192 kB region based at the
standard ARMv7-M SRAM base address of 0x20000000 is supported.
As such the following values are used:
CONFIG_SRAM_BASE_ADDRESS=0x20000000
CONFIG_SRAM_SIZE=64 # Measured in kB

3
arch/arm/platforms/fsl_frdm_k64f/board.h
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@ -41,9 +41,6 @@ This header file is used to specify and describe board-level aspects for the
#include <misc/util.h>
#define SRAM_SIZE KB(192) /* 64K in code space (ignored) + 192K in SRAM space \
*/
/* default system clock */
#define SYSCLK_DEFAULT_IOSC_HZ MHZ(120)

14
arch/arm/platforms/fsl_frdm_k64f/linker.cmd
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@ -35,10 +35,6 @@ DESCRIPTION
This is the linker script for both standard images and XIP images.
*/
/* Flash base address and size */
#define FLASH_START 0x00000000
#define FLASH_SIZE 1M
/*
* K64F Flash configuration fields
* These are 16 bytes, which must be loaded to address 0x400, and include
@ -47,14 +43,4 @@ This is the linker script for both standard images and XIP images.
*/
#define SKIP_TO_SECURITY_FRDM_K64F . = 0x400;
/*
* SRAM base address and size
*
* Although the K64F CPU has a 64 KB region of SRAM at 0x1FFF0000, it is not
* used by this BSP. Only the 192 KB region based at the standard ARMv7-M
* SRAM base address of 0x20000000 is supported.
*/
#define SRAM_START 0x20000000 /* 192K in SRAM space */
#define SRAM_SIZE 192K
#include <arch/arm/CortexM/scripts/linker.cmd>

2
arch/arm/platforms/ti_lm3s6965/board.h
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@ -41,8 +41,6 @@ the 'ti_lm3s6965' BSP.
#include <misc/util.h>
#define SRAM_SIZE KB(64)
/* default system clock */
#define SYSCLK_DEFAULT_IOSC_HZ MHZ(12)

5
arch/arm/platforms/ti_lm3s6965/linker.cmd
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@ -30,9 +30,4 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#define FLASH_START 0x00000000
#define SRAM_START 0x20000000
#define FLASH_SIZE 256K
#define SRAM_SIZE 64K
#include <arch/arm/CortexM/scripts/linker.cmd>

4
include/arch/arm/CortexM/scripts/linker.cmd
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@ -72,8 +72,8 @@ Linker script for the Cortex-M3 BSPs.
MEMORY
{
FLASH (rx) : ORIGIN = FLASH_START, LENGTH = FLASH_SIZE
SRAM (wx) : ORIGIN = SRAM_START, LENGTH = SRAM_SIZE
FLASH (rx) : ORIGIN = CONFIG_FLASH_BASE_ADDRESS, LENGTH = CONFIG_FLASH_SIZE*1K
SRAM (wx) : ORIGIN = CONFIG_SRAM_BASE_ADDRESS, LENGTH = CONFIG_SRAM_SIZE*1K
SYSTEM_CONTROL_SPACE (wx) : ORIGIN = 0xE000E000, LENGTH = 4K
SYSTEM_CONTROL_PERIPH (wx) : ORIGIN = 0x400FE000, LENGTH = 4K
}