michaelh/zephyr
1
0
Fork 0
Code Releases Activity

bluetooth: controller: nrf5: Refactor a bit radio_nrf5_ppi.h

Browse source 
Change hard-coded (D)PPI channel bitfield values to the BIT() macro
calls with the corresponding channel base value supplied as parameter,
to make it possible to actually change this base value if needed.
Remove unused *_EXCLUDE macros.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit is contained in:
Andrzej Głąbek 2020-08-28 17:46:53 +02:00 • committed by Ioannis Glaropoulos
commit 89c7588917
1 changed files with 10 additions and 30 deletions
Download patch file Download diff file Expand all files Collapse all files

40
subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf5_ppi.h
View file

@ -354,13 +354,9 @@ static inline void hal_sw_switch_timer_clear_ppi_config(void)
#define HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI(index) \
(HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_BASE + index)
#define HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_0_INCLUDE \
((PPI_CHG_CH8_Included << PPI_CHG_CH8_Pos) & PPI_CHG_CH8_Msk)
#define HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_0_EXCLUDE \
((PPI_CHG_CH8_Excluded << PPI_CHG_CH8_Pos) & PPI_CHG_CH8_Msk)
BIT(HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI(0))
#define HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_1_INCLUDE \
((PPI_CHG_CH9_Included << PPI_CHG_CH9_Pos) & PPI_CHG_CH9_Msk)
#define HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_1_EXCLUDE \
((PPI_CHG_CH9_Excluded << PPI_CHG_CH9_Pos) & PPI_CHG_CH9_Msk)
BIT(HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI(1))
#define HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_REGISTER_EVT(chan) \
NRF_PPI->CH[chan].EEP
#define HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_EVT(cc_offset) \
@ -389,13 +385,9 @@ static inline void hal_sw_switch_timer_clear_ppi_config(void)
#define HAL_SW_SWITCH_RADIO_ENABLE_PPI(index) \
(HAL_SW_SWITCH_RADIO_ENABLE_PPI_BASE + index)
#define HAL_SW_SWITCH_RADIO_ENABLE_PPI_0_INCLUDE \
((PPI_CHG_CH11_Included << PPI_CHG_CH11_Pos) & PPI_CHG_CH11_Msk)
#define HAL_SW_SWITCH_RADIO_ENABLE_PPI_0_EXCLUDE \
((PPI_CHG_CH11_Excluded << PPI_CHG_CH11_Pos) & PPI_CHG_CH11_Msk)
BIT(HAL_SW_SWITCH_RADIO_ENABLE_PPI(0))
#define HAL_SW_SWITCH_RADIO_ENABLE_PPI_1_INCLUDE \
((PPI_CHG_CH12_Included << PPI_CHG_CH12_Pos) & PPI_CHG_CH12_Msk)
#define HAL_SW_SWITCH_RADIO_ENABLE_PPI_1_EXCLUDE \
((PPI_CHG_CH12_Excluded << PPI_CHG_CH12_Pos) & PPI_CHG_CH12_Msk)
BIT(HAL_SW_SWITCH_RADIO_ENABLE_PPI(1))
#define HAL_SW_SWITCH_RADIO_ENABLE_PPI_REGISTER_EVT(chan) \
NRF_PPI->CH[chan].EEP
#define HAL_SW_SWITCH_RADIO_ENABLE_PPI_EVT(cc_offset) \
@ -486,13 +478,9 @@ static inline void hal_radio_sw_switch_cleanup(void)
#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI(index) \
(HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_BASE + index)
#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_0_INCLUDE \
((PPI_CHG_CH16_Included << PPI_CHG_CH16_Pos) & PPI_CHG_CH16_Msk)
#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_0_EXCLUDE \
((PPI_CHG_CH16_Excluded << PPI_CHG_CH16_Pos) & PPI_CHG_CH16_Msk)
BIT(HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI(0))
#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_1_INCLUDE \
((PPI_CHG_CH17_Included << PPI_CHG_CH17_Pos) & PPI_CHG_CH17_Msk)
#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_1_EXCLUDE \
((PPI_CHG_CH17_Excluded << PPI_CHG_CH17_Pos) & PPI_CHG_CH17_Msk)
BIT(HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI(1))
/* Cancel the SW switch timer running considering S8 timing:
* wire the RADIO EVENTS_RATEBOOST event to SW_SWITCH_TIMER TASKS_CAPTURE task.
@ -1079,13 +1067,9 @@ static inline void hal_sw_switch_timer_clear_ppi_config(void)
(HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_BASE + index)
#define HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_0_INCLUDE \
((DPPIC_CHG_CH8_Included << DPPIC_CHG_CH8_Pos) & DPPIC_CHG_CH8_Msk)
#define HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_0_EXCLUDE \
((DPPIC_CHG_CH8_Excluded << DPPIC_CHG_CH8_Pos) & DPPIC_CHG_CH8_Msk)
BIT(HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI(0))
#define HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_1_INCLUDE \
((DPPIC_CHG_CH9_Included << DPPIC_CHG_CH9_Pos) & DPPIC_CHG_CH9_Msk)
#define HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_1_EXCLUDE \
((DPPIC_CHG_CH9_Excluded << DPPIC_CHG_CH9_Pos) & DPPIC_CHG_CH9_Msk)
BIT(HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI(1))
#define HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_REGISTER_EVT(cc_offset) \
SW_SWITCH_TIMER->PUBLISH_COMPARE[cc_offset]
@ -1146,13 +1130,9 @@ static inline void hal_sw_switch_timer_clear_ppi_config(void)
(HAL_SW_SWITCH_RADIO_ENABLE_PPI_BASE + index)
#define HAL_SW_SWITCH_RADIO_ENABLE_PPI_0_INCLUDE \
((DPPIC_CHG_CH8_Included << DPPIC_CHG_CH8_Pos) & DPPIC_CHG_CH8_Msk)
#define HAL_SW_SWITCH_RADIO_ENABLE_PPI_0_EXCLUDE \
((DPPIC_CHG_CH8_Excluded << DPPIC_CHG_CH8_Pos) & DPPIC_CHG_CH8_Msk)
BIT(HAL_SW_SWITCH_RADIO_ENABLE_PPI(0))
#define HAL_SW_SWITCH_RADIO_ENABLE_PPI_1_INCLUDE \
((DPPIC_CHG_CH9_Included << DPPIC_CHG_CH9_Pos) & DPPIC_CHG_CH9_Msk)
#define HAL_SW_SWITCH_RADIO_ENABLE_PPI_1_EXCLUDE \
((DPPIC_CHG_CH9_Excluded << DPPIC_CHG_CH9_Pos) & DPPIC_CHG_CH9_Msk)
BIT(HAL_SW_SWITCH_RADIO_ENABLE_PPI(1))
#define HAL_SW_SWITCH_RADIO_ENABLE_PPI_REGISTER_EVT(cc_offset) \
SW_SWITCH_TIMER->PUBLISH_COMPARE[cc_offset]