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tests: kernel: gen_isr_table: add support for nRF54L15 FLPR

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Align testcase to nRF54L15 FLPR.
Follow up of #71948.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
This commit is contained in:
Marcin Szymczyk 2024-05-23 16:43:18 +02:00 • committed by Carles Cufí
commit 8999446ab8
1 changed files with 11 additions and 1 deletions
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12
tests/kernel/gen_isr_table/src/main.c
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@ -20,7 +20,12 @@ extern uint32_t _irq_vector_table[];
#endif #endif
#if defined(CONFIG_RISCV) #if defined(CONFIG_RISCV)
#if defined(CONFIG_RISCV_HAS_CLIC) #if defined(CONFIG_NRFX_CLIC)
#define ISR1_OFFSET 15
#define ISR3_OFFSET 16
#define ISR5_OFFSET 17
#define TRIG_CHECK_SIZE 18
#elif defined(CONFIG_RISCV_HAS_CLIC)
#define ISR1_OFFSET 3 #define ISR1_OFFSET 3
#define ISR3_OFFSET 17 #define ISR3_OFFSET 17
#define ISR5_OFFSET 18 #define ISR5_OFFSET 18
@ -42,7 +47,12 @@ extern uint32_t _irq_vector_table[];
#endif #endif
#define IRQ_LINE(offset) offset #define IRQ_LINE(offset) offset
#if defined(CONFIG_RISCV_RESERVED_IRQ_ISR_TABLES_OFFSET)
#define TABLE_INDEX(offset) offset + CONFIG_RISCV_RESERVED_IRQ_ISR_TABLES_OFFSET
#else
#define TABLE_INDEX(offset) offset #define TABLE_INDEX(offset) offset
#endif
#else #else
#define ISR1_OFFSET 0 #define ISR1_OFFSET 0
#define ISR2_OFFSET 1 #define ISR2_OFFSET 1