boards: arm: nrf5340_dk_nrf5340: rename target to nrf5340pdk_nrf5340
We rename the nRF53 Dev Kit board target (nrf5340_dk_nrf5340) to nrf5340pdk_nrf5340. We update all associated references in the supportive documentation and all nRF5340-related cofigurations and overlay files in the samples and tests in the tree. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
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24 changed files with 96 additions and 93 deletions
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@ -1,18 +0,0 @@
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# nRF5340 DK NRF5340 board configuration
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# Copyright (c) 2019 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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if SOC_NRF5340_CPUAPP_QKAA
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config BOARD_NRF5340_DK_NRF5340_CPUAPP
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bool "nRF5340 DK nRF5340 Application MCU"
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config BOARD_NRF5340_DK_NRF5340_CPUAPPNS
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bool "nRF5340 DK nRF5340 Application MCU non-secure"
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endif # SOC_NRF5340_CPUAPP_QKAA
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config BOARD_NRF5340_DK_NRF5340_CPUNET
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bool "nRF5340 DK NRF5340 Network MCU"
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depends on SOC_NRF5340_CPUNET_QKAA
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@ -1,7 +1,7 @@
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# Copyright (c) 2019 Nordic Semiconductor ASA.
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# SPDX-License-Identifier: Apache-2.0
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if ((CONFIG_BOARD_NRF5340_DK_NRF5340_CPUAPP OR CONFIG_BOARD_NRF5340_DK_NRF5340_CPUAPPNS)
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if ((CONFIG_BOARD_NRF5340PDK_NRF5340_CPUAPP OR CONFIG_BOARD_NRF5340PDK_NRF5340_CPUAPPNS)
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AND CONFIG_BOARD_ENABLE_CPUNET)
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zephyr_library()
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zephyr_library_sources(nrf5340_cpunet_reset.c)
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@ -1,9 +1,9 @@
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# nRF5340 DK NRF5340 board configuration
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# nRF5340 PDK board configuration
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# Copyright (c) 2019 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_NRF5340_DK_NRF5340_CPUAPP || BOARD_NRF5340_DK_NRF5340_CPUAPPNS
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if BOARD_NRF5340PDK_NRF5340_CPUAPP || BOARD_NRF5340PDK_NRF5340_CPUAPPNS
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config BOARD_ENABLE_DCDC_APP
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bool "Enable Application MCU DCDC converter"
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@ -43,9 +43,9 @@ config BOARD_ENABLE_CPUNET
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may already have started the Network MCU.
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default y if (BT || NET_L2_IEEE802154)
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endif # BOARD_NRF5340_DK_NRF5340_CPUAPP || BOARD_NRF5340_DK_NRF5340_CPUAPPNS
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endif # BOARD_NRF5340PDK_NRF5340_CPUAPP || BOARD_NRF5340PDK_NRF5340_CPUAPPNS
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if BOARD_NRF5340_DK_NRF5340_CPUNET
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if BOARD_NRF5340PDK_NRF5340_CPUNET
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# BT_CTLR depends on BT. When BT is enabled we should default to also
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# enabling the controller.
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@ -55,4 +55,4 @@ config BT_CTLR
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config BT_ECC
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default y if BT
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endif # BOARD_NRF5340_DK_NRF5340_CPUNET
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endif # BOARD_NRF5340PDK_NRF5340_CPUNET
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18
boards/arm/nrf5340pdk_nrf5340/Kconfig.board
Normal file
18
boards/arm/nrf5340pdk_nrf5340/Kconfig.board
Normal file
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# nRF5340 PDK NRF5340 board configuration
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# Copyright (c) 2019-2020 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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if SOC_NRF5340_CPUAPP_QKAA
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config BOARD_NRF5340PDK_NRF5340_CPUAPP
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bool "nRF5340 PDK nRF5340 Application MCU"
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config BOARD_NRF5340PDK_NRF5340_CPUAPPNS
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bool "nRF5340 PDK nRF5340 Application MCU non-secure"
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endif # SOC_NRF5340_CPUAPP_QKAA
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config BOARD_NRF5340PDK_NRF5340_CPUNET
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bool "nRF5340 PDK NRF5340 Network MCU"
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depends on SOC_NRF5340_CPUNET_QKAA
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@ -1,12 +1,12 @@
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# nRF5340 DK nRF5340 board configuration
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# nRF5340 PDK nRF5340 board configuration
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# Copyright (c) 2019 Nordic Semiconductor ASA
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# Copyright (c) 2019-2020 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_NRF5340_DK_NRF5340_CPUAPP || BOARD_NRF5340_DK_NRF5340_CPUAPPNS
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if BOARD_NRF5340PDK_NRF5340_CPUAPP || BOARD_NRF5340PDK_NRF5340_CPUAPPNS
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config BOARD
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default "nrf5340_dk_nrf5340_cpuapp"
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default "nrf5340pdk_nrf5340_cpuapp"
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config ADC_0
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default y
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@ -44,7 +44,7 @@ config PWM_0
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DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
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DT_CHOSEN_Z_SRAM_PARTITION := zephyr,sram-secure-partition
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if BOARD_NRF5340_DK_NRF5340_CPUAPP && TRUSTED_EXECUTION_SECURE
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if BOARD_NRF5340PDK_NRF5340_CPUAPP && TRUSTED_EXECUTION_SECURE
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config FLASH_LOAD_SIZE
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default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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config SRAM_SIZE
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default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_SRAM_PARTITION),0,K)
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endif # BOARD_NRF5340_DK_NRF5340_CPUAPP && TRUSTED_EXECUTION_SECURE
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endif # BOARD_NRF5340PDK_NRF5340_CPUAPP && TRUSTED_EXECUTION_SECURE
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if BOARD_NRF5340_DK_NRF5340_CPUAPPNS
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if BOARD_NRF5340PDK_NRF5340_CPUAPPNS
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config FLASH_LOAD_OFFSET
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default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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config FLASH_LOAD_SIZE
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default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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endif # BOARD_NRF5340_DK_NRF5340_CPUAPPNS
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endif # BOARD_NRF5340PDK_NRF5340_CPUAPPNS
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endif # BOARD_NRF5340_DK_NRF5340_CPUAPP || BOARD_NRF5340_DK_NRF5340_CPUAPPNS
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endif # BOARD_NRF5340PDK_NRF5340_CPUAPP || BOARD_NRF5340PDK_NRF5340_CPUAPPNS
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config BOARD
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default "nrf5340_dk_nrf5340_cpunet"
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depends on BOARD_NRF5340_DK_NRF5340_CPUNET
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default "nrf5340pdk_nrf5340_cpunet"
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depends on BOARD_NRF5340PDK_NRF5340_CPUNET
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@ -1,12 +1,11 @@
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# SPDX-License-Identifier: Apache-2.0
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if(CONFIG_BOARD_NRF5340_DK_NRF5340_CPUAPP OR CONFIG_BOARD_NRF5340_DK_NRF5340_CPUAPPNS)
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if(CONFIG_BOARD_NRF5340PDK_NRF5340_CPUAPP OR CONFIG_BOARD_NRF5340PDK_NRF5340_CPUAPPNS)
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board_runner_args(nrfjprog "--nrf-family=NRF53" "--tool-opt=--coprocessor CP_APPLICATION")
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board_runner_args(jlink "--device=cortex-m33" "--speed=4000")
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endif()
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if(CONFIG_BOARD_NRF5340_DK_NRF5340_CPUNET)
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if(CONFIG_BOARD_NRF5340PDK_NRF5340_CPUNET)
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board_runner_args(nrfjprog "--nrf-family=NRF53" "--tool-opt=--coprocessor CP_NETWORK")
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endif()
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Before Width: | Height: | Size: 120 KiB After Width: | Height: | Size: 120 KiB |
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.. _nrf5340_dk_nrf5340:
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.. _nrf5340pdk_nrf5340:
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nRF5340-DK
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##########
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nRF5340 PDK
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###########
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Overview
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********
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The nRF5340 DK is a single-board development kit for evaluation
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The nRF5340 PDK (PCA10095) is a single-board development kit for evaluation
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and development on the Nordic nRF5340 System-on-Chip (SoC).
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The nRF5340 is a dual-core SoC based on the Arm® Cortex®-M33 architecture, with:
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* a secondary ARM Cortex-M33 core, with a reduced feature set, running at
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a fixed 64 MHz, referred to as the **Network MCU**.
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The nrf5340_dk_nrf5340_cpuapp provides support for the Application MCU on
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nRF5340 SoC. The nrf5340_dn_nrf5340_cpunet provides support for the Network
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The nrf5340pdk_nrf5340_cpuapp provides support for the Application MCU on
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nRF5340 SoC. The nrf5340pdk_nrf5340_cpunet provides support for the Network
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MCU on nRF5340 SoC.
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nRF5340 SoC provides support for the following devices:
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* :abbr:`USB (Universal Serial Bus)`
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* :abbr:`WDT (Watchdog Timer)`
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.. figure:: img/nrf5340_dk.png
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.. figure:: img/nrf5340pdk.png
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:width: 711px
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:align: center
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:alt: nRF5340 DK
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:alt: nRF5340 PDK
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nRF5340 DK (Credit: Nordic Semiconductor)
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nRF5340 PDK (Credit: Nordic Semiconductor)
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More information about the board can be found at the
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`nRF5340 DK website`_.
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`nRF5340 PDK website`_.
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The `Nordic Semiconductor Infocenter`_
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contains the processor's information and the datasheet.
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.. note::
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In previous Zephyr releases this board was named *nrf5340_dk_nrf5340*.
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Hardware
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********
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nRF5340 DK has two external oscillators. The frequency of
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nRF5340 PDK has two external oscillators. The frequency of
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the slow clock is 32.768 kHz. The frequency of the main clock
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is 32 MHz.
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Supported Features
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==================
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The nrf5340_dk_nrf5340_cpuapp board configuration supports the following
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The nrf5340pdk_nrf5340_cpuapp board configuration supports the following
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hardware features:
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+-----------+------------+----------------------+
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| WDT | on-chip | watchdog |
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+-----------+------------+----------------------+
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The nrf5340_dk_nrf5340_cpunet board configuration supports the following
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The nrf5340pdk_nrf5340_cpunet board configuration supports the following
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hardware features:
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+-----------+------------+----------------------+
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@ -173,7 +177,7 @@ Programming and Debugging
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*************************
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nRF5340 Application MCU supports the Armv8m Security Extension.
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Applications build for the nrf5340_dk_nrf5340_cpuapp board by default
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Applications build for the nrf5340pdk_nrf5340_cpuapp board by default
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boot in the Secure state.
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nRF5340 Network MCU does not support the Armv8m Security Extension.
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The process requires the following steps:
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1. Build the Secure Zephyr application for the Application MCU
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using ``-DBOARD=nrf5340_dk_nrf5340_cpuapp`` and
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using ``-DBOARD=nrf5340pdk_nrf5340_cpuapp`` and
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``CONFIG_TRUSTED_EXECUTION_SECURE=y`` in the application
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project configuration file.
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2. Build the Non-Secure Zephyr application for the Application MCU
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using ``-DBOARD=nrf5340_dk_nrf5340_cpuappns``.
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using ``-DBOARD=nrf5340pdk_nrf5340_cpuappns``.
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3. Merge the two binaries together.
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4. Build the application firmware for the Network MCU using
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``-DBOARD=nrf5340_dk_nrf5340_cpunet``.
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``-DBOARD=nrf5340pdk_nrf5340_cpunet``.
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When building a Secure/Non-Secure application for the nRF5340 Application MCU,
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the Secure application will have to set the IDAU (SPU) configuration to allow
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==================================
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Build the Zephyr app in the usual way (see :ref:`build_an_application`
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and :ref:`application_run`), using ``-DBOARD=nrf5340_dk_nrf5340_cpuapp`` for
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and :ref:`application_run`), using ``-DBOARD=nrf5340pdk_nrf5340_cpuapp`` for
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the firmware running on the nRF5340 Application MCU, and using
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``-DBOARD=nrf5340_dk_nrf5340_cpunet`` for the firmware running
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``-DBOARD=nrf5340pdk_nrf5340_cpunet`` for the firmware running
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on the nRF5340 Network MCU.
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Flashing
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$ minicom -D <tty_device> -b 115200
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Replace :code:`<tty_device>` with the port where the board nRF5340 DK
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Replace :code:`<tty_device>` with the port where the board nRF5340 PDK
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can be found. For example, under Linux, :code:`/dev/ttyACM0`.
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Then build and flash the application in the usual way.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: nrf5340_dk_nrf5340_cpuapp
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:board: nrf5340pdk_nrf5340_cpuapp
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:goals: build flash
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Debugging
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boards with a Segger IC.
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Testing the LEDs and buttons in the nRF5340 DK
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**********************************************
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Testing the LEDs and buttons in the nRF5340 PDK
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***********************************************
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There are 2 samples that allow you to test that the buttons (switches) and
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LEDs on the board are working properly with Zephyr:
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You can build and flash the examples to make sure Zephyr is running correctly on
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your board. The button and LED definitions can be found in
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:zephyr_file:`boards/arm/nrf5340_dk_nrf5340/nrf5340_dk_nrf5340_cpuapp_common.dts`.
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:zephyr_file:`boards/arm/nrf5340pdk_nrf5340/nrf5340pdk_nrf5340_cpuapp_common.dts`.
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References
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**********
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.. _IDAU:
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https://developer.arm.com/docs/100690/latest/attribution-units-sau-and-idau
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.. _nRF5340 DK website:
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.. _nRF5340 PDK website:
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https://www.nordicsemi.com/Software-and-tools/Development-Kits/nRF5340-PDK
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.. _Nordic Semiconductor Infocenter: https://infocenter.nordicsemi.com
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#include <soc.h>
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LOG_MODULE_REGISTER(nrf5340_dk_nrf5340_cpuapp, CONFIG_LOG_DEFAULT_LEVEL);
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LOG_MODULE_REGISTER(nrf5340pdk_nrf5340_cpuapp, CONFIG_LOG_DEFAULT_LEVEL);
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#if !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
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/*
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* Copyright (c) 2019 Nordic Semiconductor ASA
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* Copyright (c) 2019-2020 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nordic/nrf5340_cpuapp_qkaa.dtsi>
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#include "nrf5340_dk_nrf5340_cpuapp_common.dts"
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#include "nrf5340pdk_nrf5340_cpuapp_common.dts"
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/ {
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chosen {
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@ -1,5 +1,5 @@
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identifier: nrf5340_dk_nrf5340_cpuapp
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name: NRF5340-DK-NRF5340-application-MCU
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identifier: nrf5340pdk_nrf5340_cpuapp
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name: NRF5340-PDK-NRF5340-application-MCU
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type: mcu
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arch: arm
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toolchain:
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@ -1,13 +1,13 @@
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/*
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* Copyright (c) 2019 Nordic Semiconductor ASA
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* Copyright (c) 2019-2020 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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model = "Nordic NRF5340 Dev Kit";
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compatible = "nordic,nrf5340-dk", "nordic,nrf5340-cpuapp-qkaa",
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"nordic,nrf5340-cpuapp";
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model = "Nordic NRF5340 PDK NRF5340 Application";
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compatible = "nordic,nrf5340-pdk-nrf5340-cpuapp",
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"nordic,nrf5340-cpuapp-qkaa", "nordic,nrf5340-cpuapp";
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chosen {
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zephyr,console = &uart0;
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};
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/* Include partition configuration file */
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#include "nrf5340_dk_nrf5340_cpuapp_partition_conf.dts"
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#include "nrf5340pdk_nrf5340_cpuapp_partition_conf.dts"
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@ -2,7 +2,7 @@
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CONFIG_SOC_SERIES_NRF53X=y
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CONFIG_SOC_NRF5340_CPUAPP_QKAA=y
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CONFIG_BOARD_NRF5340_DK_NRF5340_CPUAPP=y
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CONFIG_BOARD_NRF5340PDK_NRF5340_CPUAPP=y
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# Enable MPU
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CONFIG_ARM_MPU=y
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@ -1,11 +1,11 @@
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/*
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* Copyright (c) 2019 Nordic Semiconductor ASA
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* Copyright (c) 2019-2020 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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* Default Flash planning for nrf5340_dk_nrf5340 CPUAPP (Application MCU).
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* Default Flash planning for nrf5340pdk_nrf5340 CPUAPP (Application MCU).
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*
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* Zephyr build for nRF5340 with ARM TrustZone-M support,
|
||||
* implies building Secure and Non-Secure Zephyr images.
|
||||
|
@ -42,7 +42,7 @@
|
|||
* - Lowest 64 kB SRAM allocated to Secure image (sram0_s)
|
||||
* - Middle 384 kB allocated to Non-Secure image (sram0_ns)
|
||||
* - Upper 64 kB SRAM allocated as Shared memory (sram0_shared)
|
||||
* (see nrf5340_dk_nrf5340_shared_sram_planning_conf.dts)
|
||||
* (see nrf5340pdk_nrf5340_shared_sram_planning_conf.dts)
|
||||
*/
|
||||
&sram0 {
|
||||
reg = <0x20000000 DT_SIZE_K(448)>;
|
||||
|
@ -57,4 +57,4 @@
|
|||
};
|
||||
|
||||
/* Include shared RAM configuration file */
|
||||
#include "nrf5340_dk_nrf5340_shared_sram_planning_conf.dts"
|
||||
#include "nrf5340pdk_nrf5340_shared_sram_planning_conf.dts"
|
|
@ -1,12 +1,12 @@
|
|||
/*
|
||||
* Copyright (c) 2019 Nordic Semiconductor ASA
|
||||
* Copyright (c) 2019-2020 Nordic Semiconductor ASA
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include <nordic/nrf5340_cpuappns_qkaa.dtsi>
|
||||
#include "nrf5340_dk_nrf5340_cpuapp_common.dts"
|
||||
#include "nrf5340pdk_nrf5340_cpuapp_common.dts"
|
||||
|
||||
/ {
|
||||
chosen {
|
|
@ -1,5 +1,5 @@
|
|||
identifier: nrf5340_dk_nrf5340_cpuappns
|
||||
name: NRF5340-DK-NRF5340-application-MCU-Non-Secure
|
||||
identifier: nrf5340pdk_nrf5340_cpuappns
|
||||
name: NRF5340-PDK-NRF5340-application-MCU-Non-Secure
|
||||
type: mcu
|
||||
arch: arm
|
||||
toolchain:
|
|
@ -2,7 +2,7 @@
|
|||
|
||||
CONFIG_SOC_SERIES_NRF53X=y
|
||||
CONFIG_SOC_NRF5340_CPUAPP_QKAA=y
|
||||
CONFIG_BOARD_NRF5340_DK_NRF5340_CPUAPPNS=y
|
||||
CONFIG_BOARD_NRF5340PDK_NRF5340_CPUAPPNS=y
|
||||
|
||||
# Enable MPU
|
||||
CONFIG_ARM_MPU=y
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2019 Nordic Semiconductor ASA
|
||||
* Copyright (c) 2019-2020 Nordic Semiconductor ASA
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
@ -8,9 +8,9 @@
|
|||
#include <nordic/nrf5340_cpunet_qkaa.dtsi>
|
||||
|
||||
/ {
|
||||
model = "Nordic NRF5340 Dev Kit Network";
|
||||
compatible = "nordic,nrf5340-dk","nordic,nrf5340-cpunet-qkaa",
|
||||
"nordic,nrf5340-cpunet";
|
||||
model = "Nordic NRF5340 PDK NRF5340 Network";
|
||||
compatible = "nordic,nrf5340-pdk-nrf5340-cpunet",
|
||||
"nordic,nrf5340-cpunet-qkaa", "nordic,nrf5340-cpunet";
|
||||
|
||||
chosen {
|
||||
zephyr,console = &uart0;
|
||||
|
@ -143,4 +143,4 @@
|
|||
};
|
||||
|
||||
/* Include shared RAM configuration file */
|
||||
#include "nrf5340_dk_nrf5340_shared_sram_planning_conf.dts"
|
||||
#include "nrf5340pdk_nrf5340_shared_sram_planning_conf.dts"
|
|
@ -1,5 +1,5 @@
|
|||
identifier: nrf5340_dk_nrf5340_cpunet
|
||||
name: NRF5340-DK-NRF5340-network-MCU
|
||||
identifier: nrf5340pdk_nrf5340_cpunet
|
||||
name: NRF5340-PDK-NRF5340-network-MCU
|
||||
type: mcu
|
||||
arch: arm
|
||||
toolchain:
|
|
@ -2,7 +2,7 @@
|
|||
|
||||
CONFIG_SOC_SERIES_NRF53X=y
|
||||
CONFIG_SOC_NRF5340_CPUNET_QKAA=y
|
||||
CONFIG_BOARD_NRF5340_DK_NRF5340_CPUNET=y
|
||||
CONFIG_BOARD_NRF5340PDK_NRF5340_CPUNET=y
|
||||
|
||||
# Enable MPU
|
||||
CONFIG_ARM_MPU=y
|
|
@ -101,7 +101,7 @@ endif # BT_SPI
|
|||
|
||||
config BT_RPMSG_NRF53
|
||||
bool "nRF53 configuration of RPMsg"
|
||||
default y if (BOARD_NRF5340_DK_NRF5340_CPUAPP || BOARD_NRF5340_DK_NRF5340_CPUAPPNS)
|
||||
default y if (BOARD_NRF5340PDK_NRF5340_CPUAPP || BOARD_NRF5340PDK_NRF5340_CPUAPPNS)
|
||||
depends on BT_RPMSG
|
||||
select IPM
|
||||
select IPM_NRFX
|
||||
|
|
|
@ -5,5 +5,5 @@ sample:
|
|||
tests:
|
||||
sample.bluetooth.hci_rpmsg:
|
||||
harness: bluetooth
|
||||
platform_whitelist: nrf5340_dk_nrf5340_cpunet
|
||||
platform_whitelist: nrf5340pdk_nrf5340_cpunet
|
||||
tags: bluetooth
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue