drivers: memc: memc_mcux_flexspi: support diff RX clock source on port B
Some instances of the FlexSPI IP support a different clock source being used for port B of the FlexSPI instance. Add a devicetree property and driver support to enable configuring this property of the hardware. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
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2 changed files with 43 additions and 0 deletions
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@ -56,6 +56,10 @@ struct memc_flexspi_data {
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bool combination_mode;
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bool sck_differential_clock;
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flexspi_read_sample_clock_t rx_sample_clock;
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#if defined(FSL_FEATURE_FLEXSPI_SUPPORT_SEPERATE_RXCLKSRC_PORTB) && \
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FSL_FEATURE_FLEXSPI_SUPPORT_SEPERATE_RXCLKSRC_PORTB
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flexspi_read_sample_clock_t rx_sample_clock_b;
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#endif
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const struct pinctrl_dev_config *pincfg;
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size_t size[kFLEXSPI_PortCount];
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struct port_lut port_luts[kFLEXSPI_PortCount];
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@ -241,6 +245,14 @@ void *memc_flexspi_get_ahb_address(const struct device *dev,
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offset += data->size[i];
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}
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#if defined(FSL_FEATURE_FLEXSPI_SUPPORT_ADDRESS_SHIFT) && \
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(FSL_FEATURE_FLEXSPI_SUPPORT_ADDRESS_SHIFT)
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if (data->base->FLSHCR0[port] & FLEXSPI_FLSHCR0_ADDRSHIFT_MASK) {
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/* Address shift is set, add 0x1000_0000 to AHB address */
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offset += 0x10000000;
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}
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#endif
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return data->ahb_base + offset;
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}
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@ -282,6 +294,16 @@ static int memc_flexspi_init(const struct device *dev)
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flexspi_config.enableSckBDiffOpt = data->sck_differential_clock;
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#endif
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flexspi_config.rxSampleClock = data->rx_sample_clock;
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#if defined(FSL_FEATURE_FLEXSPI_SUPPORT_SEPERATE_RXCLKSRC_PORTB) && \
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FSL_FEATURE_FLEXSPI_SUPPORT_SEPERATE_RXCLKSRC_PORTB
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flexspi_config.rxSampleClockPortB = data->rx_sample_clock_b;
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#if defined(FSL_FEATURE_FLEXSPI_SUPPORT_RXCLKSRC_DIFF) && \
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FSL_FEATURE_FLEXSPI_SUPPORT_RXCLKSRC_DIFF
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if (flexspi_config.rxSampleClock != flexspi_config.rxSampleClockPortB) {
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flexspi_config.rxSampleClockDiff = true;
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}
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#endif
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#endif
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/* Configure AHB RX buffers, if any configuration settings are present */
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__ASSERT(data->buf_cfg_cnt < FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNT,
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@ -329,6 +351,13 @@ static int memc_flexspi_pm_action(const struct device *dev, enum pm_device_actio
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}
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#endif
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#if defined(FSL_FEATURE_FLEXSPI_SUPPORT_SEPERATE_RXCLKSRC_PORTB) && \
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FSL_FEATURE_FLEXSPI_SUPPORT_SEPERATE_RXCLKSRC_PORTB
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#define MEMC_FLEXSPI_RXCLK_B(inst) .rx_sample_clock_b = DT_INST_PROP(inst, rx_clock_source_b),
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#else
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#define MEMC_FLEXSPI_RXCLK_B(inst)
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#endif
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#if defined(CONFIG_XIP) && defined(CONFIG_FLASH_MCUX_FLEXSPI_XIP)
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/* Checks if image flash base address is in the FlexSPI AHB base region */
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#define MEMC_FLEXSPI_CFG_XIP(node_id) \
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@ -357,6 +386,7 @@ static int memc_flexspi_pm_action(const struct device *dev, enum pm_device_actio
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.combination_mode = DT_INST_PROP(n, combination_mode), \
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.sck_differential_clock = DT_INST_PROP(n, sck_differential_clock), \
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.rx_sample_clock = DT_INST_PROP(n, rx_clock_source), \
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MEMC_FLEXSPI_RXCLK_B(n) \
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.buf_cfg = (struct memc_flexspi_buf_cfg *)buf_cfg_##n, \
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.buf_cfg_cnt = sizeof(buf_cfg_##n) / \
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sizeof(struct memc_flexspi_buf_cfg), \
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@ -61,6 +61,19 @@ properties:
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Source clock for flash read. See the RXCLKSRC field in register MCR0.
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The default corresponds to the reset value of the register field.
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rx-clock-source-b:
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type: int
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default: 0
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enum:
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- 0 # Loopback internally
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- 1 # Loopback from DQS pad
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- 2 # Loopback from SCK pad
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- 3 # External input from DQS pad
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description: |
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Source clock for flash read on port B. Only supported by some instances
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of this IP. See the RXCLKSRC_B field in register MCR2.
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The default corresponds to the reset value of the register field.
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rx-buffer-config:
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type: array
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description: |
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