arm64: hold curr_cpu instance in tpidrro_el0

Let's fully exploit tpidrro_el0 by storing in it the current CPU's
struct _cpu instance alongside the userspace mode flag bit. This
greatly simplifies the code needed to get at the cpu structure, and
this paves the way to much simpler multi cluster support, as there
is no longer the need to decode MPIDR all the time.

The same code is used in the !SMP case as there are benefits there too
such as avoiding the literal pool, and it looks cleaner.

The tpidrro_el0 value is no longer stored in the exception stack frame.
Instead, we simply restore the user mode flag based on the SPSR value.
This way, more flag bits could be used independently in the future.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
This commit is contained in:
Nicolas Pitre 2021-04-09 23:01:18 -04:00 committed by Anas Nashif
commit 88477906f0
13 changed files with 55 additions and 64 deletions

View file

@ -10,21 +10,12 @@
#ifndef _ASMLANGUAGE
#include <kernel_structs.h>
#include <arch/cpu.h>
#include <arch/arm64/lib_helpers.h>
#include <arch/arm64/tpidrro_el0.h>
static ALWAYS_INLINE _cpu_t *arch_curr_cpu(void)
{
#ifdef CONFIG_SMP
uint64_t core;
/* Note: Only support one Cluster */
core = MPIDR_TO_CORE(GET_MPIDR());
return &_kernel.cpus[core];
#else
return &_kernel.cpus[0];
#endif /* CONFIG_SMP */
return (_cpu_t *)(read_tpidrro_el0() & TPIDRROEL0_CURR_CPU);
}
#endif /* !_ASMLANGUAGE */

View file

@ -32,6 +32,7 @@
#define SPSR_MODE_EL1H (0x5)
#define SPSR_MODE_EL2T (0x8)
#define SPSR_MODE_EL2H (0x9)
#define SPSR_MODE_MASK (0xf)
#define SCTLR_EL3_RES1 (BIT(29) | BIT(28) | BIT(23) | \

View file

@ -47,9 +47,6 @@ struct __esf {
uint64_t x30;
uint64_t spsr;
uint64_t elr;
#ifdef CONFIG_USERSPACE
uint64_t tpidrro_el0;
#endif
} __aligned(16);
typedef struct __esf z_arch_esf_t;

View file

@ -66,6 +66,7 @@ MAKE_REG_HELPER(hcr_el2);
MAKE_REG_HELPER(id_aa64pfr0_el1);
MAKE_REG_HELPER(id_aa64mmfr0_el1);
MAKE_REG_HELPER(scr_el3);
MAKE_REG_HELPER(tpidrro_el0);
MAKE_REG_HELPER_EL123(actlr)
MAKE_REG_HELPER_EL123(cpacr)

View file

@ -26,7 +26,8 @@
#include <zephyr/types.h>
#include <stdbool.h>
#include <arch/arm64/cpu.h>
#include <arch/arm64/lib_helpers.h>
#include <arch/arm64/tpidrro_el0.h>
#ifdef __cplusplus
extern "C" {
@ -165,11 +166,7 @@ static inline uintptr_t arch_syscall_invoke0(uintptr_t call_id)
static inline bool arch_is_user_context(void)
{
uint64_t tpidrro_el0;
__asm__ volatile("mrs %0, tpidrro_el0" : "=r" (tpidrro_el0));
return (tpidrro_el0 != 0x0);
return (read_tpidrro_el0() & TPIDRROEL0_IN_EL0) != 0;
}
#ifdef __cplusplus

View file

@ -0,0 +1,24 @@
/*
* Copyright (c) 2021 BayLibre SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief tpidrro_el0 bits allocation
*
* Among other things, the tpidrro_el0 holds the address for the current
* CPU's struct _cpu instance. But such a pointer is at least 8-bytes
* aligned, and the address space is 48 bits max. That leaves plenty of
* free bits for other purposes.
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARM64_TPIDRRO_EL0_H_
#define ZEPHYR_INCLUDE_ARCH_ARM64_TPIDRRO_EL0_H_
#define TPIDRROEL0_IN_EL0 0x0000000000000001
#define TPIDRROEL0_CURR_CPU 0x0000fffffffffff8
#endif /* ZEPHYR_INCLUDE_ARCH_ARM64_TPIDRRO_EL0_H_ */