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dts: bindings: pcie: update interrupt-map type to compound

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The interrupt-map property specifies both 32-bits values and a phandle;
update the type accordingly.

Update the definition of pcie-host-ecam-generic on qemu arm64 to match
the new type.

Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Co-authored-by: Henri Xavier <datacomos@huawei.com>
This commit is contained in:
Rodrigo Cataldo 2022-12-09 10:46:42 +01:00 • committed by Carles Cufí
commit 87e63247c9
3 changed files with 39 additions and 33 deletions
Download patch file Download diff file Expand all files Collapse all files

35
dts/arm64/qemu/qemu-virt-a53.dtsi
View file

@ -112,22 +112,25 @@
0x3000000 0x80 0x00 0x80 0x00 0x80 0x00>;
#interrupt-cells = <0x01>;
interrupt-map-mask = <0x1800 0x00 0x00 0x07>;
interrupt-map = <0x00 0x00 0x00 0x01 0x8002 0x00 0x00 0x00 0x03 0x04
0x00 0x00 0x00 0x03 0x8002 0x00 0x00 0x00 0x05 0x04
0x00 0x00 0x00 0x02 0x8002 0x00 0x00 0x00 0x04 0x04
0x00 0x00 0x00 0x04 0x8002 0x00 0x00 0x00 0x06 0x04
0x800 0x00 0x00 0x01 0x8002 0x00 0x00 0x00 0x04 0x04
0x800 0x00 0x00 0x02 0x8002 0x00 0x00 0x00 0x05 0x04
0x800 0x00 0x00 0x03 0x8002 0x00 0x00 0x00 0x06 0x04
0x800 0x00 0x00 0x04 0x8002 0x00 0x00 0x00 0x03 0x04
0x1000 0x00 0x00 0x01 0x8002 0x00 0x00 0x00 0x05 0x04
0x1000 0x00 0x00 0x02 0x8002 0x00 0x00 0x00 0x06 0x04
0x1000 0x00 0x00 0x03 0x8002 0x00 0x00 0x00 0x03 0x04
0x1000 0x00 0x00 0x04 0x8002 0x00 0x00 0x00 0x04 0x04
0x1800 0x00 0x00 0x01 0x8002 0x00 0x00 0x00 0x06 0x04
0x1800 0x00 0x00 0x02 0x8002 0x00 0x00 0x00 0x03 0x04
0x1800 0x00 0x00 0x03 0x8002 0x00 0x00 0x00 0x04 0x04
0x1800 0x00 0x00 0x04 0x8002 0x00 0x00 0x00 0x05 0x04>;
interrupt-map = <0x00 0x00 0x00 1 &gic 0 0 GIC_SPI 0x03 IRQ_TYPE_EDGE
0x00 0x00 0x00 2 &gic 0 0 GIC_SPI 0x04 IRQ_TYPE_EDGE
0x00 0x00 0x00 3 &gic 0 0 GIC_SPI 0x05 IRQ_TYPE_EDGE
0x00 0x00 0x00 4 &gic 0 0 GIC_SPI 0x06 IRQ_TYPE_EDGE
0x800 0x00 0x00 1 &gic 0 0 GIC_SPI 0x04 IRQ_TYPE_EDGE
0x800 0x00 0x00 2 &gic 0 0 GIC_SPI 0x05 IRQ_TYPE_EDGE
0x800 0x00 0x00 3 &gic 0 0 GIC_SPI 0x06 IRQ_TYPE_EDGE
0x800 0x00 0x00 4 &gic 0 0 GIC_SPI 0x03 IRQ_TYPE_EDGE
0x1000 0x00 0x00 1 &gic 0 0 GIC_SPI 0x05 IRQ_TYPE_EDGE
0x1000 0x00 0x00 2 &gic 0 0 GIC_SPI 0x06 IRQ_TYPE_EDGE
0x1000 0x00 0x00 3 &gic 0 0 GIC_SPI 0x03 IRQ_TYPE_EDGE
0x1000 0x00 0x00 4 &gic 0 0 GIC_SPI 0x04 IRQ_TYPE_EDGE
0x1800 0x00 0x00 1 &gic 0 0 GIC_SPI 0x06 IRQ_TYPE_EDGE
0x1800 0x00 0x00 2 &gic 0 0 GIC_SPI 0x03 IRQ_TYPE_EDGE
0x1800 0x00 0x00 3 &gic 0 0 GIC_SPI 0x04 IRQ_TYPE_EDGE
0x1800 0x00 0x00 4 &gic 0 0 GIC_SPI 0x05 IRQ_TYPE_EDGE>;
msi-parent = <&its>;
bus-range = <0x00 0xff>;
};

35
dts/arm64/qemu/qemu-virt-arm64.dtsi
View file

@ -112,22 +112,25 @@
0x3000000 0x80 0x00 0x80 0x00 0x80 0x00>;
#interrupt-cells = <0x01>;
interrupt-map-mask = <0x1800 0x00 0x00 0x07>;
interrupt-map = <0x00 0x00 0x00 0x01 0x8002 0x00 0x00 0x00 0x03 0x04
0x00 0x00 0x00 0x03 0x8002 0x00 0x00 0x00 0x05 0x04
0x00 0x00 0x00 0x02 0x8002 0x00 0x00 0x00 0x04 0x04
0x00 0x00 0x00 0x04 0x8002 0x00 0x00 0x00 0x06 0x04
0x800 0x00 0x00 0x01 0x8002 0x00 0x00 0x00 0x04 0x04
0x800 0x00 0x00 0x02 0x8002 0x00 0x00 0x00 0x05 0x04
0x800 0x00 0x00 0x03 0x8002 0x00 0x00 0x00 0x06 0x04
0x800 0x00 0x00 0x04 0x8002 0x00 0x00 0x00 0x03 0x04
0x1000 0x00 0x00 0x01 0x8002 0x00 0x00 0x00 0x05 0x04
0x1000 0x00 0x00 0x02 0x8002 0x00 0x00 0x00 0x06 0x04
0x1000 0x00 0x00 0x03 0x8002 0x00 0x00 0x00 0x03 0x04
0x1000 0x00 0x00 0x04 0x8002 0x00 0x00 0x00 0x04 0x04
0x1800 0x00 0x00 0x01 0x8002 0x00 0x00 0x00 0x06 0x04
0x1800 0x00 0x00 0x02 0x8002 0x00 0x00 0x00 0x03 0x04
0x1800 0x00 0x00 0x03 0x8002 0x00 0x00 0x00 0x04 0x04
0x1800 0x00 0x00 0x04 0x8002 0x00 0x00 0x00 0x05 0x04>;
interrupt-map = <0x00 0x00 0x00 1 &gic 0 0 GIC_SPI 0x03 IRQ_TYPE_EDGE
0x00 0x00 0x00 2 &gic 0 0 GIC_SPI 0x04 IRQ_TYPE_EDGE
0x00 0x00 0x00 3 &gic 0 0 GIC_SPI 0x05 IRQ_TYPE_EDGE
0x00 0x00 0x00 4 &gic 0 0 GIC_SPI 0x06 IRQ_TYPE_EDGE
0x800 0x00 0x00 1 &gic 0 0 GIC_SPI 0x04 IRQ_TYPE_EDGE
0x800 0x00 0x00 2 &gic 0 0 GIC_SPI 0x05 IRQ_TYPE_EDGE
0x800 0x00 0x00 3 &gic 0 0 GIC_SPI 0x06 IRQ_TYPE_EDGE
0x800 0x00 0x00 4 &gic 0 0 GIC_SPI 0x03 IRQ_TYPE_EDGE
0x1000 0x00 0x00 1 &gic 0 0 GIC_SPI 0x05 IRQ_TYPE_EDGE
0x1000 0x00 0x00 2 &gic 0 0 GIC_SPI 0x06 IRQ_TYPE_EDGE
0x1000 0x00 0x00 3 &gic 0 0 GIC_SPI 0x03 IRQ_TYPE_EDGE
0x1000 0x00 0x00 4 &gic 0 0 GIC_SPI 0x04 IRQ_TYPE_EDGE
0x1800 0x00 0x00 1 &gic 0 0 GIC_SPI 0x06 IRQ_TYPE_EDGE
0x1800 0x00 0x00 2 &gic 0 0 GIC_SPI 0x03 IRQ_TYPE_EDGE
0x1800 0x00 0x00 3 &gic 0 0 GIC_SPI 0x04 IRQ_TYPE_EDGE
0x1800 0x00 0x00 4 &gic 0 0 GIC_SPI 0x05 IRQ_TYPE_EDGE>;
msi-parent = <&its>;
bus-range = <0x00 0xff>;
};

2
dts/bindings/pcie/host/pci-host-ecam-generic.yaml
View file

@ -26,7 +26,7 @@ properties:
type: array
interrupt-map:
type: array
type: compound
bus-range:
type: array