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arch: arm: rename CPU_HAS_NXP_MPU to align with binding

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Following the binding rename to "nxp,sysmpu", update the Kconfig
option to align with the binding name and to better reflect the
option's purpose.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This commit is contained in:
Manuel Argüelles 2024-12-03 09:00:43 +07:00 • committed by Benjamin Cabé
commit 87798f9e16
15 changed files with 29 additions and 28 deletions
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6
arch/arm/Kconfig
View file

@ -155,12 +155,12 @@ config CPU_HAS_ARM_MPU
This option is enabled when the CPU has a Memory Protection Unit (MPU) This option is enabled when the CPU has a Memory Protection Unit (MPU)
in ARM flavor. in ARM flavor.
config CPU_HAS_NXP_MPU config CPU_HAS_NXP_SYSMPU
bool bool
select CPU_HAS_MPU select CPU_HAS_MPU
help help
This option is enabled when the CPU has a Memory Protection Unit (MPU) This option is enabled when the CPU has an NXP System Memory Protection
in NXP flavor. Unit (SYSMPU).
config CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS config CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS
bool "Custom fixed SoC MPU region definition" bool "Custom fixed SoC MPU region definition"

8
arch/arm/core/cortex_m/fault.c
View file

@ -35,7 +35,7 @@ LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#define PR_FAULT_INFO(...) #define PR_FAULT_INFO(...)
#endif #endif
#if defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_MPU) #if defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_SYSMPU)
#define EMN(edr) (((edr) & SYSMPU_EDR_EMN_MASK) >> SYSMPU_EDR_EMN_SHIFT) #define EMN(edr) (((edr) & SYSMPU_EDR_EMN_MASK) >> SYSMPU_EDR_EMN_SHIFT)
#define EACD(edr) (((edr) & SYSMPU_EDR_EACD_MASK) >> SYSMPU_EDR_EACD_SHIFT) #define EACD(edr) (((edr) & SYSMPU_EDR_EACD_MASK) >> SYSMPU_EDR_EACD_SHIFT)
#endif #endif
@ -392,7 +392,7 @@ static int bus_fault(struct arch_esf *esf, int from_hard_fault, bool *recoverabl
} }
#endif /* !defined(CONFIG_ARMV7_M_ARMV8_M_FP) */ #endif /* !defined(CONFIG_ARMV7_M_ARMV8_M_FP) */
#if defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_MPU) #if defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_SYSMPU)
uint32_t sperr = SYSMPU->CESR & SYSMPU_CESR_SPERR_MASK; uint32_t sperr = SYSMPU->CESR & SYSMPU_CESR_SPERR_MASK;
uint32_t mask = BIT(31); uint32_t mask = BIT(31);
int i; int i;
@ -427,7 +427,7 @@ static int bus_fault(struct arch_esf *esf, int from_hard_fault, bool *recoverabl
/* Note: we can assume the fault originated /* Note: we can assume the fault originated
* from the same security state for ARM * from the same security state for ARM
* platforms implementing the NXP MPU * platforms implementing the NXP MPU
* (CONFIG_CPU_HAS_NXP_MPU=y). * (CONFIG_CPU_HAS_NXP_SYSMPU=y).
* *
* As we only assess thread stack corruption, * As we only assess thread stack corruption,
* we only process the error further, if the * we only process the error further, if the
@ -483,7 +483,7 @@ static int bus_fault(struct arch_esf *esf, int from_hard_fault, bool *recoverabl
} }
SYSMPU->CESR &= ~sperr; SYSMPU->CESR &= ~sperr;
} }
#endif /* defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_MPU) */ #endif /* defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_SYSMPU) */
/* clear BFSR sticky bits */ /* clear BFSR sticky bits */
SCB->CFSR |= SCB_CFSR_BUSFAULTSR_Msk; SCB->CFSR |= SCB_CFSR_BUSFAULTSR_Msk;

6
arch/arm/core/cortex_m/scb.c
View file

@ -23,7 +23,7 @@
#include <zephyr/cache.h> #include <zephyr/cache.h>
#include <zephyr/arch/cache.h> #include <zephyr/arch/cache.h>
#if defined(CONFIG_CPU_HAS_NXP_MPU) #if defined(CONFIG_CPU_HAS_NXP_SYSMPU)
#include <fsl_sysmpu.h> #include <fsl_sysmpu.h>
#endif #endif
@ -62,7 +62,7 @@ void z_arm_clear_arm_mpu_config(void)
ARM_MPU_ClrRegion(i); ARM_MPU_ClrRegion(i);
} }
} }
#elif CONFIG_CPU_HAS_NXP_MPU #elif CONFIG_CPU_HAS_NXP_SYSMPU
void z_arm_clear_arm_mpu_config(void) void z_arm_clear_arm_mpu_config(void)
{ {
int i; int i;
@ -76,7 +76,7 @@ void z_arm_clear_arm_mpu_config(void)
SYSMPU_RegionEnable(SYSMPU, i, false); SYSMPU_RegionEnable(SYSMPU, i, false);
} }
} }
#endif /* CONFIG_CPU_HAS_NXP_MPU */ #endif /* CONFIG_CPU_HAS_NXP_SYSMPU */
#endif /* CONFIG_ARM_MPU */ #endif /* CONFIG_ARM_MPU */
#if defined(CONFIG_INIT_ARCH_HW_AT_BOOT) #if defined(CONFIG_INIT_ARCH_HW_AT_BOOT)

4
arch/arm/core/mpu/CMakeLists.txt
View file

@ -4,11 +4,11 @@ zephyr_library()
zephyr_library_sources( arm_core_mpu.c) zephyr_library_sources( arm_core_mpu.c)
zephyr_library_sources_ifdef(CONFIG_CPU_HAS_ARM_MPU arm_mpu.c) zephyr_library_sources_ifdef(CONFIG_CPU_HAS_ARM_MPU arm_mpu.c)
zephyr_library_sources_ifdef(CONFIG_CPU_HAS_NXP_MPU nxp_mpu.c) zephyr_library_sources_ifdef(CONFIG_CPU_HAS_NXP_SYSMPU nxp_mpu.c)
if(CONFIG_CPU_CORTEX_M AND NOT CONFIG_CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS) if(CONFIG_CPU_CORTEX_M AND NOT CONFIG_CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS)
zephyr_library_sources_ifdef(CONFIG_CPU_HAS_ARM_MPU arm_mpu_regions.c) zephyr_library_sources_ifdef(CONFIG_CPU_HAS_ARM_MPU arm_mpu_regions.c)
zephyr_library_sources_ifdef(CONFIG_CPU_HAS_NXP_MPU nxp_mpu_regions.c) zephyr_library_sources_ifdef(CONFIG_CPU_HAS_NXP_SYSMPU nxp_mpu_regions.c)
endif() endif()
if (CONFIG_CPU_AARCH32_CORTEX_R) if (CONFIG_CPU_AARCH32_CORTEX_R)

2
arch/arm/core/mpu/Kconfig
View file

@ -11,7 +11,7 @@ config ARM_MPU
select SRAM_REGION_PERMISSIONS select SRAM_REGION_PERMISSIONS
select THREAD_STACK_INFO select THREAD_STACK_INFO
select ARCH_HAS_EXECUTABLE_PAGE_BIT select ARCH_HAS_EXECUTABLE_PAGE_BIT
select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if !(CPU_HAS_NXP_MPU || ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R) select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if !(CPU_HAS_NXP_SYSMPU || ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R)
select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if CPU_HAS_ARM_MPU && (ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R) select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if CPU_HAS_ARM_MPU && (ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R)
select MPU_GAP_FILLING if AARCH32_ARMV8_R select MPU_GAP_FILLING if AARCH32_ARMV8_R
select ARCH_MEM_DOMAIN_SUPPORTS_ISOLATED_STACKS select ARCH_MEM_DOMAIN_SUPPORTS_ISOLATED_STACKS

4
arch/arm/core/mpu/arm_core_mpu_dev.h
View file

@ -76,7 +76,7 @@ struct k_thread;
*/ */
#if (defined(CONFIG_MPU_REQUIRES_NON_OVERLAPPING_REGIONS) && \ #if (defined(CONFIG_MPU_REQUIRES_NON_OVERLAPPING_REGIONS) && \
defined(CONFIG_MPU_GAP_FILLING)) \ defined(CONFIG_MPU_GAP_FILLING)) \
|| defined(CONFIG_CPU_HAS_NXP_MPU) || defined(CONFIG_CPU_HAS_NXP_SYSMPU)
/* /*
* When dynamic regions may not be defined on top of statically * When dynamic regions may not be defined on top of statically
* allocated memory regions, defining a region for a supervisor * allocated memory regions, defining a region for a supervisor
@ -96,7 +96,7 @@ struct k_thread;
* using a single MPU region. * using a single MPU region.
*/ */
#define ARM_CORE_MPU_NUM_MPU_REGIONS_FOR_MPU_STACK_GUARD 1 #define ARM_CORE_MPU_NUM_MPU_REGIONS_FOR_MPU_STACK_GUARD 1
#endif /* CONFIG_MPU_REQUIRES_NON_OVERLAPPING_REGIONS || CPU_HAS_NXP_MPU */ #endif /* CONFIG_MPU_REQUIRES_NON_OVERLAPPING_REGIONS || CPU_HAS_NXP_SYSMPU */
#endif /* CONFIG_USERSPACE */ #endif /* CONFIG_USERSPACE */

4
include/zephyr/arch/arm/arch.h
View file

@ -267,9 +267,9 @@ enum k_fatal_error_reason_arch {
#ifdef CONFIG_CPU_HAS_ARM_MPU #ifdef CONFIG_CPU_HAS_ARM_MPU
#include <zephyr/arch/arm/mpu/arm_mpu.h> #include <zephyr/arch/arm/mpu/arm_mpu.h>
#endif /* CONFIG_CPU_HAS_ARM_MPU */ #endif /* CONFIG_CPU_HAS_ARM_MPU */
#ifdef CONFIG_CPU_HAS_NXP_MPU #ifdef CONFIG_CPU_HAS_NXP_SYSMPU
#include <zephyr/arch/arm/mpu/nxp_mpu.h> #include <zephyr/arch/arm/mpu/nxp_mpu.h>
#endif /* CONFIG_CPU_HAS_NXP_MPU */ #endif /* CONFIG_CPU_HAS_NXP_SYSMPU */
#endif /* CONFIG_ARM_MPU */ #endif /* CONFIG_ARM_MPU */
#ifdef CONFIG_ARM_AARCH32_MMU #ifdef CONFIG_ARM_AARCH32_MMU
#include <zephyr/arch/arm/mmu/arm_mmu.h> #include <zephyr/arch/arm/mmu/arm_mmu.h>

2
soc/nxp/kinetis/k2x/CMakeLists.txt
View file

@ -9,7 +9,7 @@ zephyr_sources(
soc.c soc.c
) )
if(DEFINED CONFIG_ARM_MPU AND DEFINED CONFIG_CPU_HAS_NXP_MPU) if(DEFINED CONFIG_ARM_MPU AND DEFINED CONFIG_CPU_HAS_NXP_SYSMPU)
# MK22F12 series MCUs have NXP MPU # MK22F12 series MCUs have NXP MPU
zephyr_sources(nxp_mpu_regions.c) zephyr_sources(nxp_mpu_regions.c)
endif() endif()

2
soc/nxp/kinetis/k2x/Kconfig
View file

@ -45,4 +45,4 @@ config SOC_MK22F12
select CPU_HAS_FPU select CPU_HAS_FPU
select HAS_MCUX_DAC select HAS_MCUX_DAC
select HAS_MCUX_RCM select HAS_MCUX_RCM
select CPU_HAS_NXP_MPU select CPU_HAS_NXP_SYSMPU

2
soc/nxp/kinetis/k6x/Kconfig
View file

@ -7,7 +7,7 @@ config SOC_SERIES_KINETIS_K6X
select ARM select ARM
select CPU_CORTEX_M4 select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_NXP_MPU select CPU_HAS_NXP_SYSMPU
select HAS_MCUX_PIT select HAS_MCUX_PIT
select CLOCK_CONTROL select CLOCK_CONTROL
select SOC_RESET_HOOK select SOC_RESET_HOOK

2
soc/nxp/kinetis/k8x/Kconfig
View file

@ -8,7 +8,7 @@ config SOC_SERIES_KINETIS_K8X
select ARM select ARM
select CPU_CORTEX_M4 select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_NXP_MPU select CPU_HAS_NXP_SYSMPU
select CPU_HAS_FPU select CPU_HAS_FPU
select CLOCK_CONTROL select CLOCK_CONTROL
select HAS_MCUX select HAS_MCUX

2
soc/nxp/kinetis/ke1xf/Kconfig
View file

@ -8,7 +8,7 @@ config SOC_SERIES_KINETIS_KE1XF
select ARM select ARM
select CPU_CORTEX_M4 select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_NXP_MPU select CPU_HAS_NXP_SYSMPU
select CPU_HAS_FPU select CPU_HAS_FPU
select CLOCK_CONTROL select CLOCK_CONTROL
select HAS_MCUX select HAS_MCUX

2
soc/nxp/s32/s32k1/Kconfig
View file

@ -7,7 +7,7 @@ config SOC_SERIES_S32K1
select ARM select ARM
select HAS_NXP_S32_HAL select HAS_NXP_S32_HAL
select HAS_MCUX select HAS_MCUX
select CPU_HAS_NXP_MPU select CPU_HAS_NXP_SYSMPU
select CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS select CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS
select MPU_ALLOW_FLASH_WRITE if !XIP select MPU_ALLOW_FLASH_WRITE if !XIP
select CLOCK_CONTROL select CLOCK_CONTROL

4
tests/application_development/code_relocation/src/main.c
View file

@ -16,7 +16,7 @@
* have to configure the region appropriately in arm_mpu_regions.c. * have to configure the region appropriately in arm_mpu_regions.c.
*/ */
#if (defined(CONFIG_ARM_MPU) && !defined(CONFIG_CPU_HAS_NXP_MPU)) #if (defined(CONFIG_ARM_MPU) && !defined(CONFIG_CPU_HAS_NXP_SYSMPU))
#include <cmsis_core.h> #include <cmsis_core.h>
void disable_mpu_rasr_xn(void) void disable_mpu_rasr_xn(void)
{ {
@ -71,7 +71,7 @@ void z_early_memset(void *dst, int c, size_t n)
void *relocate_code_setup(void) void *relocate_code_setup(void)
{ {
#if (defined(CONFIG_ARM_MPU) && !defined(CONFIG_CPU_HAS_NXP_MPU)) #if (defined(CONFIG_ARM_MPU) && !defined(CONFIG_CPU_HAS_NXP_SYSMPU))
disable_mpu_rasr_xn(); disable_mpu_rasr_xn();
#endif /* CONFIG_ARM_MPU */ #endif /* CONFIG_ARM_MPU */
return NULL; return NULL;

7
tests/application_development/code_relocation/testcase.yaml
View file

@ -2,21 +2,22 @@ common:
tags: linker tags: linker
tests: tests:
application_development.code_relocation: application_development.code_relocation:
filter: not CONFIG_CPU_HAS_NXP_MPU and CONFIG_MINIMAL_LIBC and dt_chosen_enabled("zephyr,itcm") filter: not CONFIG_CPU_HAS_NXP_SYSMPU and CONFIG_MINIMAL_LIBC and
dt_chosen_enabled("zephyr,itcm")
arch_allow: arm arch_allow: arm
extra_configs: extra_configs:
- CONFIG_RELOCATE_TO_ITCM=y - CONFIG_RELOCATE_TO_ITCM=y
platform_allow: platform_allow:
- mimxrt1060_evk - mimxrt1060_evk
application_development.code_relocation_kinetis: application_development.code_relocation_kinetis:
filter: CONFIG_CPU_HAS_NXP_MPU filter: CONFIG_CPU_HAS_NXP_SYSMPU
arch_allow: arm arch_allow: arm
extra_configs: extra_configs:
- CONFIG_MPU_ALLOW_FLASH_WRITE=y - CONFIG_MPU_ALLOW_FLASH_WRITE=y
platform_allow: platform_allow:
- frdm_k64f - frdm_k64f
application_development.code_relocation.no_itcm: application_development.code_relocation.no_itcm:
filter: not CONFIG_CPU_HAS_NXP_MPU and not dt_chosen_enabled("zephyr,itcm") filter: not CONFIG_CPU_HAS_NXP_SYSMPU and not dt_chosen_enabled("zephyr,itcm")
arch_allow: arm arch_allow: arm
extra_sections: extra_sections:
- _SRAM2_RODATA_SECTION_NAME - _SRAM2_RODATA_SECTION_NAME