drivers: serial: stm32: reduce pointer level from config->usart to usart
This change reduces the level of pointer indirection, which minimizes repeated dereferencing and helps reduce the overall code size. Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
This commit is contained in:
Pisit Sawangvonganan
Alberto Escolar
parent
49399ec48c
commit
86e0fe13e1
1 changed files with 117 additions and 100 deletions
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@ -126,6 +126,7 @@ static void uart_stm32_pm_policy_state_lock_put(const struct device *dev)
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static inline void uart_stm32_set_baudrate(const struct device *dev, uint32_t baud_rate)
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{
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const struct uart_stm32_config *config = dev->config;
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USART_TypeDef *usart = config->usart;
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struct uart_stm32_data *data = dev->data;
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uint32_t clock_rate;
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@ -148,7 +149,7 @@ static inline void uart_stm32_set_baudrate(const struct device *dev, uint32_t ba
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}
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#if HAS_LPUART
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if (IS_LPUART_INSTANCE(config->usart)) {
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if (IS_LPUART_INSTANCE(usart)) {
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uint32_t lpuartdiv;
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#ifdef USART_PRESC_PRESCALER
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uint8_t presc_idx;
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@ -168,7 +169,7 @@ static inline void uart_stm32_set_baudrate(const struct device *dev, uint32_t ba
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presc_val = presc_idx << USART_PRESC_PRESCALER_Pos;
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LL_LPUART_SetPrescaler(config->usart, presc_val);
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LL_LPUART_SetPrescaler(usart, presc_val);
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#else
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lpuartdiv = lpuartdiv_calc(clock_rate, baud_rate);
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if (lpuartdiv < LPUART_BRR_MIN_VALUE || lpuartdiv > LPUART_BRR_MASK) {
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@ -176,26 +177,26 @@ static inline void uart_stm32_set_baudrate(const struct device *dev, uint32_t ba
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return;
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}
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#endif /* USART_PRESC_PRESCALER */
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LL_LPUART_SetBaudRate(config->usart,
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LL_LPUART_SetBaudRate(usart,
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clock_rate,
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#ifdef USART_PRESC_PRESCALER
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presc_val,
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#endif
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baud_rate);
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/* Check BRR is greater than or equal to 0x300 */
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__ASSERT(LL_LPUART_ReadReg(config->usart, BRR) >= 0x300U,
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__ASSERT(LL_LPUART_ReadReg(usart, BRR) >= 0x300U,
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"BaudRateReg >= 0x300");
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/* Check BRR is lower than or equal to 0xFFFFF */
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__ASSERT(LL_LPUART_ReadReg(config->usart, BRR) < 0x000FFFFFU,
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__ASSERT(LL_LPUART_ReadReg(usart, BRR) < 0x000FFFFFU,
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"BaudRateReg < 0xFFFF");
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} else {
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#endif /* HAS_LPUART */
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#ifdef USART_CR1_OVER8
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LL_USART_SetOverSampling(config->usart,
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LL_USART_SetOverSampling(usart,
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LL_USART_OVERSAMPLING_16);
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#endif
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LL_USART_SetBaudRate(config->usart,
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LL_USART_SetBaudRate(usart,
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clock_rate,
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#ifdef USART_PRESC_PRESCALER
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LL_USART_PRESCALER_DIV1,
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@ -205,7 +206,7 @@ static inline void uart_stm32_set_baudrate(const struct device *dev, uint32_t ba
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#endif
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baud_rate);
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/* Check BRR is greater than or equal to 16d */
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__ASSERT(LL_USART_ReadReg(config->usart, BRR) >= 16,
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__ASSERT(LL_USART_ReadReg(usart, BRR) >= 16,
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"BaudRateReg >= 16");
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#if HAS_LPUART
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@ -533,6 +534,7 @@ static int uart_stm32_configure(const struct device *dev,
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const struct uart_config *cfg)
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{
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const struct uart_stm32_config *config = dev->config;
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USART_TypeDef *usart = config->usart;
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struct uart_stm32_data *data = dev->data;
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struct uart_config *uart_cfg = data->uart_cfg;
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const uint32_t parity = uart_stm32_cfg2ll_parity(cfg->parity);
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@ -569,21 +571,21 @@ static int uart_stm32_configure(const struct device *dev,
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/* Driver supports only RTS/CTS and RS485 flow control */
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if (!(cfg->flow_ctrl == UART_CFG_FLOW_CTRL_NONE
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|| (cfg->flow_ctrl == UART_CFG_FLOW_CTRL_RTS_CTS &&
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IS_UART_HWFLOW_INSTANCE(config->usart))
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IS_UART_HWFLOW_INSTANCE(usart))
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#if HAS_DRIVER_ENABLE
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|| (cfg->flow_ctrl == UART_CFG_FLOW_CTRL_RS485 &&
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IS_UART_DRIVER_ENABLE_INSTANCE(config->usart))
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IS_UART_DRIVER_ENABLE_INSTANCE(usart))
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#endif
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)) {
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return -ENOTSUP;
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}
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LL_USART_Disable(config->usart);
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LL_USART_Disable(usart);
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/* Set basic parameters, such as data-/stop-bit, parity, and baudrate */
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uart_stm32_parameters_set(dev, cfg);
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LL_USART_Enable(config->usart);
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LL_USART_Enable(usart);
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/* Upon successful configuration, persist the syscall-passed
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* uart_config.
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@ -625,17 +627,18 @@ typedef void (*poll_in_fn)(
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static int uart_stm32_poll_in_visitor(const struct device *dev, void *in, poll_in_fn get_fn)
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{
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const struct uart_stm32_config *config = dev->config;
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USART_TypeDef *usart = config->usart;
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/* Clear overrun error flag */
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if (LL_USART_IsActiveFlag_ORE(config->usart)) {
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LL_USART_ClearFlag_ORE(config->usart);
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if (LL_USART_IsActiveFlag_ORE(usart)) {
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LL_USART_ClearFlag_ORE(usart);
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}
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/*
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* On stm32 F4X, F1X, and F2X, the RXNE flag is affected (cleared) by
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* the uart_err_check function call (on errors flags clearing)
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*/
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if (!LL_USART_IsActiveFlag_RXNE(config->usart)) {
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if (!LL_USART_IsActiveFlag_RXNE(usart)) {
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return -1;
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}
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@ -650,6 +653,7 @@ typedef void (*poll_out_fn)(
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static void uart_stm32_poll_out_visitor(const struct device *dev, void *out, poll_out_fn set_fn)
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{
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const struct uart_stm32_config *config = dev->config;
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USART_TypeDef *usart = config->usart;
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#ifdef CONFIG_PM
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struct uart_stm32_data *data = dev->data;
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#endif
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@ -661,9 +665,9 @@ static void uart_stm32_poll_out_visitor(const struct device *dev, void *out, pol
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* interlaced with the characters potentially send with interrupt transmission API
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*/
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while (1) {
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if (LL_USART_IsActiveFlag_TXE(config->usart)) {
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if (LL_USART_IsActiveFlag_TXE(usart)) {
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key = irq_lock();
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if (LL_USART_IsActiveFlag_TXE(config->usart)) {
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if (LL_USART_IsActiveFlag_TXE(usart)) {
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break;
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}
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irq_unlock(key);
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@ -686,7 +690,7 @@ static void uart_stm32_poll_out_visitor(const struct device *dev, void *out, pol
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/* Enable TC interrupt so we can release suspend
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* constraint when done
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*/
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LL_USART_EnableIT_TC(config->usart);
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LL_USART_EnableIT_TC(usart);
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}
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#endif /* CONFIG_PM */
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@ -741,6 +745,7 @@ static void uart_stm32_poll_out_u16(const struct device *dev, uint16_t out_u16)
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static int uart_stm32_err_check(const struct device *dev)
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{
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const struct uart_stm32_config *config = dev->config;
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USART_TypeDef *usart = config->usart;
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uint32_t err = 0U;
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/* Check for errors, then clear them.
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@ -748,29 +753,29 @@ static int uart_stm32_err_check(const struct device *dev)
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* one is cleared. (e.g. F4X, F1X, and F2X).
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* The stm32 F4X, F1X, and F2X also reads the usart DR when clearing Errors
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*/
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if (LL_USART_IsActiveFlag_ORE(config->usart)) {
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if (LL_USART_IsActiveFlag_ORE(usart)) {
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err |= UART_ERROR_OVERRUN;
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}
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if (LL_USART_IsActiveFlag_PE(config->usart)) {
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if (LL_USART_IsActiveFlag_PE(usart)) {
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err |= UART_ERROR_PARITY;
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}
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if (LL_USART_IsActiveFlag_FE(config->usart)) {
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if (LL_USART_IsActiveFlag_FE(usart)) {
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err |= UART_ERROR_FRAMING;
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}
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if (LL_USART_IsActiveFlag_NE(config->usart)) {
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if (LL_USART_IsActiveFlag_NE(usart)) {
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err |= UART_ERROR_NOISE;
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}
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#if !defined(CONFIG_SOC_SERIES_STM32F0X) || defined(USART_LIN_SUPPORT)
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if (LL_USART_IsActiveFlag_LBD(config->usart)) {
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if (LL_USART_IsActiveFlag_LBD(usart)) {
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err |= UART_BREAK;
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}
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if (err & UART_BREAK) {
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LL_USART_ClearFlag_LBD(config->usart);
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LL_USART_ClearFlag_LBD(usart);
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}
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#endif
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/* Clearing error :
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@ -779,19 +784,19 @@ static int uart_stm32_err_check(const struct device *dev)
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* --> so is the RXNE flag also cleared !
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*/
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if (err & UART_ERROR_OVERRUN) {
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LL_USART_ClearFlag_ORE(config->usart);
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LL_USART_ClearFlag_ORE(usart);
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}
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if (err & UART_ERROR_PARITY) {
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LL_USART_ClearFlag_PE(config->usart);
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LL_USART_ClearFlag_PE(usart);
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}
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if (err & UART_ERROR_FRAMING) {
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LL_USART_ClearFlag_FE(config->usart);
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LL_USART_ClearFlag_FE(usart);
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}
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if (err & UART_ERROR_NOISE) {
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LL_USART_ClearFlag_NE(config->usart);
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LL_USART_ClearFlag_NE(usart);
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}
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return err;
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@ -814,17 +819,18 @@ static int uart_stm32_fifo_fill_visitor(const struct device *dev, const void *tx
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fifo_fill_fn fill_fn)
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{
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const struct uart_stm32_config *config = dev->config;
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USART_TypeDef *usart = config->usart;
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uint8_t num_tx = 0U;
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unsigned int key;
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if (!LL_USART_IsActiveFlag_TXE(config->usart)) {
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if (!LL_USART_IsActiveFlag_TXE(usart)) {
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return num_tx;
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}
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/* Lock interrupts to prevent nested interrupts or thread switch */
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key = irq_lock();
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while ((size - num_tx > 0) && LL_USART_IsActiveFlag_TXE(config->usart)) {
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while ((size - num_tx > 0) && LL_USART_IsActiveFlag_TXE(usart)) {
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/* TXE flag will be cleared with byte write to DR|RDR register */
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/* Send a character */
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@ -862,17 +868,18 @@ static int uart_stm32_fifo_read_visitor(const struct device *dev, void *rx_data,
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fifo_read_fn read_fn)
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{
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const struct uart_stm32_config *config = dev->config;
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USART_TypeDef *usart = config->usart;
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uint8_t num_rx = 0U;
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while ((size - num_rx > 0) && LL_USART_IsActiveFlag_RXNE(config->usart)) {
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while ((size - num_rx > 0) && LL_USART_IsActiveFlag_RXNE(usart)) {
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/* RXNE flag will be cleared upon read from DR|RDR register */
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read_fn(config, rx_data, num_rx);
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num_rx++;
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/* Clear overrun error flag */
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if (LL_USART_IsActiveFlag_ORE(config->usart)) {
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LL_USART_ClearFlag_ORE(config->usart);
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if (LL_USART_IsActiveFlag_ORE(usart)) {
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LL_USART_ClearFlag_ORE(usart);
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/*
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* On stm32 F4X, F1X, and F2X, the RXNE flag is affected (cleared) by
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* the uart_err_check function call (on errors flags clearing)
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@ -1027,43 +1034,46 @@ static int uart_stm32_irq_rx_ready(const struct device *dev)
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static void uart_stm32_irq_err_enable(const struct device *dev)
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{
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const struct uart_stm32_config *config = dev->config;
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USART_TypeDef *usart = config->usart;
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/* Enable FE, ORE interruptions */
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LL_USART_EnableIT_ERROR(config->usart);
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LL_USART_EnableIT_ERROR(usart);
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#if !defined(CONFIG_SOC_SERIES_STM32F0X) || defined(USART_LIN_SUPPORT)
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/* Enable Line break detection */
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if (IS_UART_LIN_INSTANCE(config->usart)) {
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LL_USART_EnableIT_LBD(config->usart);
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if (IS_UART_LIN_INSTANCE(usart)) {
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LL_USART_EnableIT_LBD(usart);
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}
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#endif
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/* Enable parity error interruption */
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LL_USART_EnableIT_PE(config->usart);
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LL_USART_EnableIT_PE(usart);
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}
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static void uart_stm32_irq_err_disable(const struct device *dev)
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{
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const struct uart_stm32_config *config = dev->config;
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USART_TypeDef *usart = config->usart;
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/* Disable FE, ORE interruptions */
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LL_USART_DisableIT_ERROR(config->usart);
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LL_USART_DisableIT_ERROR(usart);
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#if !defined(CONFIG_SOC_SERIES_STM32F0X) || defined(USART_LIN_SUPPORT)
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/* Disable Line break detection */
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if (IS_UART_LIN_INSTANCE(config->usart)) {
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LL_USART_DisableIT_LBD(config->usart);
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if (IS_UART_LIN_INSTANCE(usart)) {
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LL_USART_DisableIT_LBD(usart);
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}
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#endif
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/* Disable parity error interruption */
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LL_USART_DisableIT_PE(config->usart);
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LL_USART_DisableIT_PE(usart);
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}
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static int uart_stm32_irq_is_pending(const struct device *dev)
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{
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const struct uart_stm32_config *config = dev->config;
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USART_TypeDef *usart = config->usart;
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return ((LL_USART_IsActiveFlag_RXNE(config->usart) &&
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LL_USART_IsEnabledIT_RXNE(config->usart)) ||
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(LL_USART_IsActiveFlag_TC(config->usart) &&
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LL_USART_IsEnabledIT_TC(config->usart)));
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return ((LL_USART_IsActiveFlag_RXNE(usart) &&
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LL_USART_IsEnabledIT_RXNE(usart)) ||
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(LL_USART_IsActiveFlag_TC(usart) &&
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LL_USART_IsEnabledIT_TC(usart)));
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}
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static int uart_stm32_irq_update(const struct device *dev)
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@ -1224,17 +1234,18 @@ static void uart_stm32_isr(const struct device *dev)
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struct uart_stm32_data *data = dev->data;
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#if defined(CONFIG_PM) || defined(CONFIG_UART_ASYNC_API)
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const struct uart_stm32_config *config = dev->config;
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USART_TypeDef *usart = config->usart;
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#endif
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#ifdef CONFIG_PM
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if (LL_USART_IsEnabledIT_TC(config->usart) &&
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LL_USART_IsActiveFlag_TC(config->usart)) {
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if (LL_USART_IsEnabledIT_TC(usart) &&
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LL_USART_IsActiveFlag_TC(usart)) {
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if (data->tx_poll_stream_on) {
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/* A poll stream transmission just completed,
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* allow system to suspend
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*/
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LL_USART_DisableIT_TC(config->usart);
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LL_USART_DisableIT_TC(usart);
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data->tx_poll_stream_on = false;
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uart_stm32_pm_policy_state_lock_put(dev);
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}
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@ -1252,10 +1263,10 @@ static void uart_stm32_isr(const struct device *dev)
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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#ifdef CONFIG_UART_ASYNC_API
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if (LL_USART_IsEnabledIT_IDLE(config->usart) &&
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LL_USART_IsActiveFlag_IDLE(config->usart)) {
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if (LL_USART_IsEnabledIT_IDLE(usart) &&
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LL_USART_IsActiveFlag_IDLE(usart)) {
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LL_USART_ClearFlag_IDLE(config->usart);
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LL_USART_ClearFlag_IDLE(usart);
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LOG_DBG("idle interrupt occurred");
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@ -1266,24 +1277,24 @@ static void uart_stm32_isr(const struct device *dev)
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async_timer_start(&data->dma_rx.timeout_work,
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data->dma_rx.timeout);
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}
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} else if (LL_USART_IsEnabledIT_TC(config->usart) &&
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LL_USART_IsActiveFlag_TC(config->usart)) {
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} else if (LL_USART_IsEnabledIT_TC(usart) &&
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LL_USART_IsActiveFlag_TC(usart)) {
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LL_USART_DisableIT_TC(config->usart);
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LL_USART_DisableIT_TC(usart);
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/* Generate TX_DONE event when transmission is done */
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async_evt_tx_done(data);
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#ifdef CONFIG_PM
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uart_stm32_pm_policy_state_lock_put(dev);
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#endif
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} else if (LL_USART_IsEnabledIT_RXNE(config->usart) &&
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LL_USART_IsActiveFlag_RXNE(config->usart)) {
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} else if (LL_USART_IsEnabledIT_RXNE(usart) &&
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LL_USART_IsActiveFlag_RXNE(usart)) {
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#ifdef USART_SR_RXNE
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/* clear the RXNE flag, because Rx data was not read */
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LL_USART_ClearFlag_RXNE(config->usart);
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LL_USART_ClearFlag_RXNE(usart);
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||||
#else
|
||||
/* clear the RXNE by flushing the fifo, because Rx data was not read */
|
||||
LL_USART_RequestRxDataFlush(config->usart);
|
||||
LL_USART_RequestRxDataFlush(usart);
|
||||
#endif /* USART_SR_RXNE */
|
||||
}
|
||||
|
||||
|
|
@ -1293,12 +1304,12 @@ static void uart_stm32_isr(const struct device *dev)
|
|||
|
||||
#if defined(CONFIG_PM) && defined(IS_UART_WAKEUP_FROMSTOP_INSTANCE) \
|
||||
&& defined(USART_CR3_WUFIE)
|
||||
if (LL_USART_IsEnabledIT_WKUP(config->usart) &&
|
||||
LL_USART_IsActiveFlag_WKUP(config->usart)) {
|
||||
if (LL_USART_IsEnabledIT_WKUP(usart) &&
|
||||
LL_USART_IsActiveFlag_WKUP(usart)) {
|
||||
|
||||
LL_USART_ClearFlag_WKUP(config->usart);
|
||||
LL_USART_ClearFlag_WKUP(usart);
|
||||
#ifdef USART_ISR_REACK
|
||||
while (LL_USART_IsActiveFlag_REACK(config->usart) == 0) {
|
||||
while (LL_USART_IsActiveFlag_REACK(usart) == 0) {
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
|
@ -1395,6 +1406,7 @@ static inline void uart_stm32_dma_rx_disable(const struct device *dev)
|
|||
static int uart_stm32_async_rx_disable(const struct device *dev)
|
||||
{
|
||||
const struct uart_stm32_config *config = dev->config;
|
||||
USART_TypeDef *usart = config->usart;
|
||||
struct uart_stm32_data *data = dev->data;
|
||||
struct uart_event disabled_event = {
|
||||
.type = UART_RX_DISABLED
|
||||
|
|
@ -1405,7 +1417,7 @@ static int uart_stm32_async_rx_disable(const struct device *dev)
|
|||
return -EFAULT;
|
||||
}
|
||||
|
||||
LL_USART_DisableIT_IDLE(config->usart);
|
||||
LL_USART_DisableIT_IDLE(usart);
|
||||
|
||||
uart_stm32_dma_rx_flush(dev);
|
||||
|
||||
|
|
@ -1429,7 +1441,7 @@ static int uart_stm32_async_rx_disable(const struct device *dev)
|
|||
data->rx_next_buffer_len = 0;
|
||||
|
||||
/* When async rx is disabled, enable interruptible instance of uart to function normally */
|
||||
LL_USART_EnableIT_RXNE(config->usart);
|
||||
LL_USART_EnableIT_RXNE(usart);
|
||||
|
||||
LOG_DBG("rx: disabled");
|
||||
|
||||
|
|
@ -1465,6 +1477,7 @@ void uart_stm32_dma_tx_cb(const struct device *dma_dev, void *user_data,
|
|||
static void uart_stm32_dma_replace_buffer(const struct device *dev)
|
||||
{
|
||||
const struct uart_stm32_config *config = dev->config;
|
||||
USART_TypeDef *usart = config->usart;
|
||||
struct uart_stm32_data *data = dev->data;
|
||||
|
||||
/* Replace the buffer and reload the DMA */
|
||||
|
|
@ -1487,7 +1500,7 @@ static void uart_stm32_dma_replace_buffer(const struct device *dev)
|
|||
|
||||
dma_start(data->dma_rx.dma_dev, data->dma_rx.dma_channel);
|
||||
|
||||
LL_USART_ClearFlag_IDLE(config->usart);
|
||||
LL_USART_ClearFlag_IDLE(usart);
|
||||
|
||||
/* Request next buffer */
|
||||
async_evt_rx_buf_request(data);
|
||||
|
|
@ -1534,6 +1547,7 @@ static int uart_stm32_async_tx(const struct device *dev,
|
|||
const uint8_t *tx_data, size_t buf_size, int32_t timeout)
|
||||
{
|
||||
const struct uart_stm32_config *config = dev->config;
|
||||
USART_TypeDef *usart = config->usart;
|
||||
struct uart_stm32_data *data = dev->data;
|
||||
int ret;
|
||||
|
||||
|
|
@ -1559,10 +1573,10 @@ static int uart_stm32_async_tx(const struct device *dev,
|
|||
LOG_DBG("tx: l=%d", data->dma_tx.buffer_length);
|
||||
|
||||
/* Clear TC flag */
|
||||
LL_USART_ClearFlag_TC(config->usart);
|
||||
LL_USART_ClearFlag_TC(usart);
|
||||
|
||||
/* Enable TC interrupt so we can signal correct TX done */
|
||||
LL_USART_EnableIT_TC(config->usart);
|
||||
LL_USART_EnableIT_TC(usart);
|
||||
|
||||
/* set source address */
|
||||
data->dma_tx.blk_cfg.source_address = (uint32_t)data->dma_tx.buffer;
|
||||
|
|
@ -1600,6 +1614,7 @@ static int uart_stm32_async_rx_enable(const struct device *dev,
|
|||
uint8_t *rx_buf, size_t buf_size, int32_t timeout)
|
||||
{
|
||||
const struct uart_stm32_config *config = dev->config;
|
||||
USART_TypeDef *usart = config->usart;
|
||||
struct uart_stm32_data *data = dev->data;
|
||||
int ret;
|
||||
|
||||
|
|
@ -1626,7 +1641,7 @@ static int uart_stm32_async_rx_enable(const struct device *dev,
|
|||
data->dma_rx.timeout = timeout;
|
||||
|
||||
/* Disable RX interrupts to let DMA to handle it */
|
||||
LL_USART_DisableIT_RXNE(config->usart);
|
||||
LL_USART_DisableIT_RXNE(usart);
|
||||
|
||||
data->dma_rx.blk_cfg.block_size = buf_size;
|
||||
data->dma_rx.blk_cfg.dest_address = (uint32_t)data->dma_rx.buffer;
|
||||
|
|
@ -1646,9 +1661,9 @@ static int uart_stm32_async_rx_enable(const struct device *dev,
|
|||
|
||||
/* Flush RX data buffer */
|
||||
#ifdef USART_SR_RXNE
|
||||
LL_USART_ClearFlag_RXNE(config->usart);
|
||||
LL_USART_ClearFlag_RXNE(usart);
|
||||
#else
|
||||
LL_USART_RequestRxDataFlush(config->usart);
|
||||
LL_USART_RequestRxDataFlush(usart);
|
||||
#endif /* USART_SR_RXNE */
|
||||
|
||||
/* Enable RX DMA requests */
|
||||
|
|
@ -1657,10 +1672,10 @@ static int uart_stm32_async_rx_enable(const struct device *dev,
|
|||
/* Enable IRQ IDLE to define the end of a
|
||||
* RX DMA transaction.
|
||||
*/
|
||||
LL_USART_ClearFlag_IDLE(config->usart);
|
||||
LL_USART_EnableIT_IDLE(config->usart);
|
||||
LL_USART_ClearFlag_IDLE(usart);
|
||||
LL_USART_EnableIT_IDLE(usart);
|
||||
|
||||
LL_USART_EnableIT_ERROR(config->usart);
|
||||
LL_USART_EnableIT_ERROR(usart);
|
||||
|
||||
/* Request next buffer */
|
||||
async_evt_rx_buf_request(data);
|
||||
|
|
@ -1761,6 +1776,7 @@ static int uart_stm32_async_rx_buf_rsp(const struct device *dev, uint8_t *buf,
|
|||
static int uart_stm32_async_init(const struct device *dev)
|
||||
{
|
||||
const struct uart_stm32_config *config = dev->config;
|
||||
USART_TypeDef *usart = config->usart;
|
||||
struct uart_stm32_data *data = dev->data;
|
||||
|
||||
data->uart_dev = dev;
|
||||
|
|
@ -1794,10 +1810,10 @@ static int uart_stm32_async_init(const struct device *dev)
|
|||
defined(CONFIG_SOC_SERIES_STM32F4X) || \
|
||||
defined(CONFIG_SOC_SERIES_STM32L1X)
|
||||
data->dma_rx.blk_cfg.source_address =
|
||||
LL_USART_DMA_GetRegAddr(config->usart);
|
||||
LL_USART_DMA_GetRegAddr(usart);
|
||||
#else
|
||||
data->dma_rx.blk_cfg.source_address =
|
||||
LL_USART_DMA_GetRegAddr(config->usart,
|
||||
LL_USART_DMA_GetRegAddr(usart,
|
||||
LL_USART_DMA_REG_DATA_RECEIVE);
|
||||
#endif
|
||||
|
||||
|
|
@ -1833,10 +1849,10 @@ static int uart_stm32_async_init(const struct device *dev)
|
|||
defined(CONFIG_SOC_SERIES_STM32F4X) || \
|
||||
defined(CONFIG_SOC_SERIES_STM32L1X)
|
||||
data->dma_tx.blk_cfg.dest_address =
|
||||
LL_USART_DMA_GetRegAddr(config->usart);
|
||||
LL_USART_DMA_GetRegAddr(usart);
|
||||
#else
|
||||
data->dma_tx.blk_cfg.dest_address =
|
||||
LL_USART_DMA_GetRegAddr(config->usart,
|
||||
LL_USART_DMA_GetRegAddr(usart,
|
||||
LL_USART_DMA_REG_DATA_TRANSMIT);
|
||||
#endif
|
||||
|
||||
|
|
@ -1968,10 +1984,11 @@ static int uart_stm32_clocks_enable(const struct device *dev)
|
|||
static int uart_stm32_registers_configure(const struct device *dev)
|
||||
{
|
||||
const struct uart_stm32_config *config = dev->config;
|
||||
USART_TypeDef *usart = config->usart;
|
||||
struct uart_stm32_data *data = dev->data;
|
||||
struct uart_config *uart_cfg = data->uart_cfg;
|
||||
|
||||
LL_USART_Disable(config->usart);
|
||||
LL_USART_Disable(usart);
|
||||
|
||||
if (!device_is_ready(config->reset.dev)) {
|
||||
LOG_ERR("reset controller not ready");
|
||||
|
|
@ -1982,55 +1999,54 @@ static int uart_stm32_registers_configure(const struct device *dev)
|
|||
(void)reset_line_toggle_dt(&config->reset);
|
||||
|
||||
/* TX/RX direction */
|
||||
LL_USART_SetTransferDirection(config->usart,
|
||||
LL_USART_DIRECTION_TX_RX);
|
||||
LL_USART_SetTransferDirection(usart, LL_USART_DIRECTION_TX_RX);
|
||||
|
||||
/* Set basic parameters, such as data-/stop-bit, parity, and baudrate */
|
||||
uart_stm32_parameters_set(dev, uart_cfg);
|
||||
|
||||
/* Enable the single wire / half-duplex mode */
|
||||
if (config->single_wire) {
|
||||
LL_USART_EnableHalfDuplex(config->usart);
|
||||
LL_USART_EnableHalfDuplex(usart);
|
||||
}
|
||||
|
||||
#ifdef LL_USART_TXRX_SWAPPED
|
||||
if (config->tx_rx_swap) {
|
||||
LL_USART_SetTXRXSwap(config->usart, LL_USART_TXRX_SWAPPED);
|
||||
LL_USART_SetTXRXSwap(usart, LL_USART_TXRX_SWAPPED);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef LL_USART_RXPIN_LEVEL_INVERTED
|
||||
if (config->rx_invert) {
|
||||
LL_USART_SetRXPinLevel(config->usart, LL_USART_RXPIN_LEVEL_INVERTED);
|
||||
LL_USART_SetRXPinLevel(usart, LL_USART_RXPIN_LEVEL_INVERTED);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef LL_USART_TXPIN_LEVEL_INVERTED
|
||||
if (config->tx_invert) {
|
||||
LL_USART_SetTXPinLevel(config->usart, LL_USART_TXPIN_LEVEL_INVERTED);
|
||||
LL_USART_SetTXPinLevel(usart, LL_USART_TXPIN_LEVEL_INVERTED);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if HAS_DRIVER_ENABLE
|
||||
if (config->de_enable) {
|
||||
if (!IS_UART_DRIVER_ENABLE_INSTANCE(config->usart)) {
|
||||
if (!IS_UART_DRIVER_ENABLE_INSTANCE(usart)) {
|
||||
LOG_ERR("%s does not support driver enable", dev->name);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
uart_stm32_set_driver_enable(dev, true);
|
||||
LL_USART_SetDEAssertionTime(config->usart, config->de_assert_time);
|
||||
LL_USART_SetDEDeassertionTime(config->usart, config->de_deassert_time);
|
||||
LL_USART_SetDEAssertionTime(usart, config->de_assert_time);
|
||||
LL_USART_SetDEDeassertionTime(usart, config->de_deassert_time);
|
||||
|
||||
if (config->de_invert) {
|
||||
LL_USART_SetDESignalPolarity(config->usart, LL_USART_DE_POLARITY_LOW);
|
||||
LL_USART_SetDESignalPolarity(usart, LL_USART_DE_POLARITY_LOW);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef USART_CR1_FIFOEN
|
||||
if (config->fifo_enable) {
|
||||
LL_USART_EnableFIFO(config->usart);
|
||||
LL_USART_EnableFIFO(usart);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
@ -2042,11 +2058,11 @@ static int uart_stm32_registers_configure(const struct device *dev)
|
|||
* CONFIG_PM_DEVICE=y : Controlled by pm_device_wakeup_enable()
|
||||
*/
|
||||
#ifdef USART_CR3_WUFIE
|
||||
LL_USART_SetWKUPType(config->usart, LL_USART_WAKEUP_ON_RXNE);
|
||||
LL_USART_EnableIT_WKUP(config->usart);
|
||||
LL_USART_ClearFlag_WKUP(config->usart);
|
||||
LL_USART_SetWKUPType(usart, LL_USART_WAKEUP_ON_RXNE);
|
||||
LL_USART_EnableIT_WKUP(usart);
|
||||
LL_USART_ClearFlag_WKUP(usart);
|
||||
#endif
|
||||
LL_USART_EnableInStopMode(config->usart);
|
||||
LL_USART_EnableInStopMode(usart);
|
||||
|
||||
if (config->wakeup_line != STM32_EXTI_LINE_NONE) {
|
||||
/* Prepare the WAKEUP with the expected EXTI line */
|
||||
|
|
@ -2055,17 +2071,17 @@ static int uart_stm32_registers_configure(const struct device *dev)
|
|||
}
|
||||
#endif /* CONFIG_PM */
|
||||
|
||||
LL_USART_Enable(config->usart);
|
||||
LL_USART_Enable(usart);
|
||||
|
||||
#ifdef USART_ISR_TEACK
|
||||
/* Wait until TEACK flag is set */
|
||||
while (!(LL_USART_IsActiveFlag_TEACK(config->usart))) {
|
||||
while (!(LL_USART_IsActiveFlag_TEACK(usart))) {
|
||||
}
|
||||
#endif /* !USART_ISR_TEACK */
|
||||
|
||||
#ifdef USART_ISR_REACK
|
||||
/* Wait until REACK flag is set */
|
||||
while (!(LL_USART_IsActiveFlag_REACK(config->usart))) {
|
||||
while (!(LL_USART_IsActiveFlag_REACK(usart))) {
|
||||
}
|
||||
#endif /* !USART_ISR_REACK */
|
||||
|
||||
|
|
@ -2120,21 +2136,22 @@ static int uart_stm32_init(const struct device *dev)
|
|||
static void uart_stm32_suspend_setup(const struct device *dev)
|
||||
{
|
||||
const struct uart_stm32_config *config = dev->config;
|
||||
USART_TypeDef *usart = config->usart;
|
||||
|
||||
#ifdef USART_ISR_BUSY
|
||||
/* Make sure that no USART transfer is on-going */
|
||||
while (LL_USART_IsActiveFlag_BUSY(config->usart) == 1) {
|
||||
while (LL_USART_IsActiveFlag_BUSY(usart) == 1) {
|
||||
}
|
||||
#endif
|
||||
while (LL_USART_IsActiveFlag_TC(config->usart) == 0) {
|
||||
while (LL_USART_IsActiveFlag_TC(usart) == 0) {
|
||||
}
|
||||
#ifdef USART_ISR_REACK
|
||||
/* Make sure that USART is ready for reception */
|
||||
while (LL_USART_IsActiveFlag_REACK(config->usart) == 0) {
|
||||
while (LL_USART_IsActiveFlag_REACK(usart) == 0) {
|
||||
}
|
||||
#endif
|
||||
/* Clear OVERRUN flag */
|
||||
LL_USART_ClearFlag_ORE(config->usart);
|
||||
LL_USART_ClearFlag_ORE(usart);
|
||||
}
|
||||
|
||||
static int uart_stm32_pm_action(const struct device *dev,
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue