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soc: st: stm32: hsem: update description for fifth HSEM

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The fifth HSEM (#define is equal to 4 due to zero-indexing) is used on
STM32H7 to synchronize the two cores. Update the comment above the SEMID
define to reflect this alternate usage. Also remove the associated define
CFG_HW_ENTRY_STOP_MODE_MASK_SEMID, which is unused.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
This commit is contained in:
Mathieu Choplain 2025-05-27 13:52:03 +02:00 • committed by Benjamin Cabé
commit 86c5135982
1 changed files with 6 additions and 2 deletions
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8
soc/st/stm32/common/stm32_hsem.h
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@ -28,9 +28,13 @@
/* Index of the semaphore used to access the RCC */
#define CFG_HW_RCC_SEMID 3U
/* Index of the semaphore used to manage the entry Stop Mode procedure */
/**
* Index of the semaphore used to manage the entry Stop Mode procedure.
* On STM32H7, this semaphore is instead used to gate the Cortex-M4 core
* until Cortex-M7 has finished initializing the system, and remains owned
* by CM7 afterwards.
*/
#define CFG_HW_ENTRY_STOP_MODE_SEMID 4U
#define CFG_HW_ENTRY_STOP_MODE_MASK_SEMID (1U << CFG_HW_ENTRY_STOP_MODE_SEMID)
/**
* Index of the semaphore used to manage the CLK48 clock configuration