From 86c1b571034384f8f76dc416263232e4963c396b Mon Sep 17 00:00:00 2001 From: Ioannis Glaropoulos Date: Wed, 27 Jan 2021 14:24:59 +0100 Subject: [PATCH] arm: cortex_m: select by default FP sharing mode when using the FPU For applications that make use of the FPU in cortex m, we enforce the FPU sharing registers mode, because the compiler, under certain optimization regimes, may use FP instructions and create FP context in any thread, so the unshared registers mode is not practically supported. In addition to that we force FPU_SHARING to depend on MULTITHREADING, as FPU sharing mode does not make sense outside the normal multi-threaded builds. Signed-off-by: Ioannis Glaropoulos --- arch/Kconfig | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/Kconfig b/arch/Kconfig index 34b45f4951a..194eb3591c7 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -764,12 +764,22 @@ config FPU config FPU_SHARING bool "FPU register sharing" - depends on FPU + depends on FPU && MULTITHREADING + default y if ARM && ARMV7_M_ARMV8_M_FP help This option enables preservation of the hardware floating point registers across context switches to allow multiple threads to perform concurrent floating point operations. + Note that on Cortex-M processors with the floating point extension we + enable by default the FPU register sharing mode, as some GCC compilers + may activate a floating point context by generating FP instructions for + any thread, and that context must be preserved when switching such + threads in and out. The developers can still disable the FP sharing + mode in their application projects, and switch to Unshared FP registers + mode, if it is guaranteed that the image code does not generate FP + instructions outside the single thread context that is allowed to do so. + endmenu menu "Cache Options"