soc: atmel: use new DT pinctrl accessors
Update to use the new APIs. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
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2 changed files with 11 additions and 19 deletions
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@ -15,30 +15,26 @@
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/* Devicetree related macros to construct pin mux config data */
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/* Devicetree related macros to construct pin mux config data */
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/* Get a node id from a pinctrl-0 prop at index 'i' */
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#define NODE_ID_FROM_PINCTRL_0(node_id, i) \
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DT_PHANDLE_BY_IDX(node_id, pinctrl_0, i)
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/* Get PIN associated with pinctrl-0 pin at index 'i' */
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/* Get PIN associated with pinctrl-0 pin at index 'i' */
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#define ATMEL_SAM_PIN(node_id, i) \
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#define ATMEL_SAM_PIN(node_id, i) \
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DT_PHA(NODE_ID_FROM_PINCTRL_0(node_id, i), atmel_pins, pin)
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DT_PHA(DT_PINCTRL_0(node_id, i), atmel_pins, pin)
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/* Get PIO register address associated with pinctrl-0 pin at index 'i' */
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/* Get PIO register address associated with pinctrl-0 pin at index 'i' */
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#define ATMEL_SAM_PIN_TO_PIO_REG_ADDR(node_id, i) \
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#define ATMEL_SAM_PIN_TO_PIO_REG_ADDR(node_id, i) \
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DT_REG_ADDR(DT_PHANDLE(NODE_ID_FROM_PINCTRL_0(node_id, i), atmel_pins))
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DT_REG_ADDR(DT_PHANDLE(DT_PINCTRL_0(node_id, i), atmel_pins))
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/* Get peripheral id for PIO associated with pinctrl-0 pin at index 'i' */
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/* Get peripheral id for PIO associated with pinctrl-0 pin at index 'i' */
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#define ATMEL_SAM_PIN_2_PIO_PERIPH_ID(node_id, i) \
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#define ATMEL_SAM_PIN_2_PIO_PERIPH_ID(node_id, i) \
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DT_PROP_BY_PHANDLE(NODE_ID_FROM_PINCTRL_0(node_id, i),\
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DT_PROP_BY_PHANDLE(DT_PINCTRL_0(node_id, i),\
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atmel_pins, peripheral_id)
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atmel_pins, peripheral_id)
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/* Get peripheral cfg associated wiith pinctrl-0 pin at index 'i' */
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/* Get peripheral cfg associated wiith pinctrl-0 pin at index 'i' */
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#define ATMEL_SAM_PIN_PERIPH(node_id, i) \
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#define ATMEL_SAM_PIN_PERIPH(node_id, i) \
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DT_PHA(NODE_ID_FROM_PINCTRL_0(node_id, i), atmel_pins, peripheral)
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DT_PHA(DT_PINCTRL_0(node_id, i), atmel_pins, peripheral)
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/* Helper function for ATMEL_SAM_PIN_FLAGS */
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/* Helper function for ATMEL_SAM_PIN_FLAGS */
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#define ATMEL_SAM_PIN_FLAG(node_id, i, flag) \
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#define ATMEL_SAM_PIN_FLAG(node_id, i, flag) \
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DT_PROP(NODE_ID_FROM_PINCTRL_0(node_id, i), flag)
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DT_PROP(DT_PINCTRL_0(node_id, i), flag)
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/* Convert DT flags to SoC flags */
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/* Convert DT flags to SoC flags */
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#define ATMEL_SAM_PIN_FLAGS(node_id, i) \
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#define ATMEL_SAM_PIN_FLAGS(node_id, i) \
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@ -81,7 +77,7 @@
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#endif
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#endif
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/* Get the number of pins for pinctrl-0 */
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/* Get the number of pins for pinctrl-0 */
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#define ATMEL_SAM_DT_NUM_PINS(node_id) DT_PROP_LEN(node_id, pinctrl_0)
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#define ATMEL_SAM_DT_NUM_PINS(node_id) DT_NUM_PINCTRLS_BY_IDX(node_id, 0)
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#define ATMEL_SAM_DT_INST_NUM_PINS(inst) \
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#define ATMEL_SAM_DT_INST_NUM_PINS(inst) \
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ATMEL_SAM_DT_NUM_PINS(DT_DRV_INST(inst))
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ATMEL_SAM_DT_NUM_PINS(DT_DRV_INST(inst))
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@ -50,25 +50,21 @@
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/* Devicetree related macros to construct pin mux config data */
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/* Devicetree related macros to construct pin mux config data */
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/* Get a node id from a pinctrl-0 prop at index 'i' */
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#define NODE_ID_FROM_PINCTRL_0(node_id, i) \
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DT_PHANDLE_BY_IDX(node_id, pinctrl_0, i)
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/* Get PIN associated with pinctrl-0 pin at index 'i' */
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/* Get PIN associated with pinctrl-0 pin at index 'i' */
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#define ATMEL_SAM0_PIN(node_id, i) \
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#define ATMEL_SAM0_PIN(node_id, i) \
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DT_PHA(NODE_ID_FROM_PINCTRL_0(node_id, i), atmel_pins, pin)
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DT_PHA(DT_PINCTRL_0(node_id, i), atmel_pins, pin)
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/* Get PIO register address associated with pinctrl-0 pin at index 'i' */
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/* Get PIO register address associated with pinctrl-0 pin at index 'i' */
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#define ATMEL_SAM0_PIN_TO_PORT_REG_ADDR(node_id, i) \
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#define ATMEL_SAM0_PIN_TO_PORT_REG_ADDR(node_id, i) \
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DT_REG_ADDR(DT_PHANDLE(NODE_ID_FROM_PINCTRL_0(node_id, i), atmel_pins))
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DT_REG_ADDR(DT_PHANDLE(DT_PINCTRL_0(node_id, i), atmel_pins))
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/* Get peripheral cfg associated wiith pinctrl-0 pin at index 'i' */
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/* Get peripheral cfg associated wiith pinctrl-0 pin at index 'i' */
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#define ATMEL_SAM0_PIN_PERIPH(node_id, i) \
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#define ATMEL_SAM0_PIN_PERIPH(node_id, i) \
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DT_PHA(NODE_ID_FROM_PINCTRL_0(node_id, i), atmel_pins, peripheral)
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DT_PHA(DT_PINCTRL_0(node_id, i), atmel_pins, peripheral)
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/* Helper function for ATMEL_SAM_PIN_FLAGS */
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/* Helper function for ATMEL_SAM_PIN_FLAGS */
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#define ATMEL_SAM0_PIN_FLAG(node_id, i, flag) \
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#define ATMEL_SAM0_PIN_FLAG(node_id, i, flag) \
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DT_PROP(NODE_ID_FROM_PINCTRL_0(node_id, i), flag)
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DT_PROP(DT_PINCTRL_0(node_id, i), flag)
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/* Convert DT flags to SoC flags */
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/* Convert DT flags to SoC flags */
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#define ATMEL_SAM0_PIN_FLAGS(node_id, i) \
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#define ATMEL_SAM0_PIN_FLAGS(node_id, i) \
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@ -88,7 +84,7 @@
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}
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}
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/* Get the number of pins for pinctrl-0 */
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/* Get the number of pins for pinctrl-0 */
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#define ATMEL_SAM0_DT_NUM_PINS(node_id) DT_PROP_LEN(node_id, pinctrl_0)
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#define ATMEL_SAM0_DT_NUM_PINS(node_id) DT_NUM_PINCTRLS_BY_IDX(node_id, 0)
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#define ATMEL_SAM0_DT_INST_NUM_PINS(inst) \
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#define ATMEL_SAM0_DT_INST_NUM_PINS(inst) \
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ATMEL_SAM0_DT_NUM_PINS(DT_DRV_INST(inst))
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ATMEL_SAM0_DT_NUM_PINS(DT_DRV_INST(inst))
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