drivers: serial: npcx: drop usage of uart_device_config
Create a driver specific configuration structure, containing the required fields only. Since the config struct can now store a pointer to the UART structure, casts from address to (struct uart_reg *) are no longer needed. HAL_INSTANCE has also been dropped in favor of using the uart field from the config struct now that it is possible. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
parent
dbdaf8ddba
commit
863a661f70
1 changed files with 68 additions and 51 deletions
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@ -22,7 +22,10 @@ LOG_MODULE_REGISTER(uart_npcx, LOG_LEVEL_ERR);
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/* Driver config */
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/* Driver config */
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struct uart_npcx_config {
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struct uart_npcx_config {
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struct uart_device_config uconf;
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struct uart_reg *inst;
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uart_irq_config_func_t irq_config_func;
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#endif
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/* clock configuration */
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/* clock configuration */
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struct npcx_clk_cfg clk_cfg;
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struct npcx_clk_cfg clk_cfg;
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/* int-mux configuration */
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/* int-mux configuration */
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@ -56,10 +59,6 @@ struct uart_npcx_data {
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#endif
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#endif
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};
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};
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/* Driver convenience defines */
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#define HAL_INSTANCE(dev) \
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((struct uart_reg *)((const struct uart_npcx_config *)(dev)->config)->uconf.base)
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#if defined(CONFIG_PM) && defined(CONFIG_UART_INTERRUPT_DRIVEN)
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#if defined(CONFIG_PM) && defined(CONFIG_UART_INTERRUPT_DRIVEN)
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static void uart_npcx_pm_constraint_set(struct uart_npcx_data *data,
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static void uart_npcx_pm_constraint_set(struct uart_npcx_data *data,
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enum uart_pm_constraint_flag flag)
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enum uart_pm_constraint_flag flag)
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@ -102,7 +101,8 @@ static int uart_set_npcx_baud_rate(struct uart_reg *const inst, int baud_rate, i
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static int uart_npcx_tx_fifo_ready(const struct device *dev)
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static int uart_npcx_tx_fifo_ready(const struct device *dev)
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{
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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/* True if the Tx FIFO is not completely full */
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/* True if the Tx FIFO is not completely full */
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return !(GET_FIELD(inst->UFTSTS, NPCX_UFTSTS_TEMPTY_LVL) == 0);
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return !(GET_FIELD(inst->UFTSTS, NPCX_UFTSTS_TEMPTY_LVL) == 0);
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@ -110,7 +110,8 @@ static int uart_npcx_tx_fifo_ready(const struct device *dev)
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static int uart_npcx_rx_fifo_available(const struct device *dev)
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static int uart_npcx_rx_fifo_available(const struct device *dev)
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{
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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/* True if at least one byte is in the Rx FIFO */
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/* True if at least one byte is in the Rx FIFO */
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return IS_BIT_SET(inst->UFRSTS, NPCX_UFRSTS_RFIFO_NEMPTY_STS);
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return IS_BIT_SET(inst->UFRSTS, NPCX_UFRSTS_RFIFO_NEMPTY_STS);
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@ -118,16 +119,19 @@ static int uart_npcx_rx_fifo_available(const struct device *dev)
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static void uart_npcx_dis_all_tx_interrupts(const struct device *dev)
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static void uart_npcx_dis_all_tx_interrupts(const struct device *dev)
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{
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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/* Disable all Tx interrupts */
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/* Disable all Tx interrupts */
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inst->UFTCTL &= ~(BIT(NPCX_UFTCTL_TEMPTY_LVL_EN) | BIT(NPCX_UFTCTL_TEMPTY_EN) |
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inst->UFTCTL &= ~(BIT(NPCX_UFTCTL_TEMPTY_LVL_EN) |
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BIT(NPCX_UFTCTL_TEMPTY_EN) |
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BIT(NPCX_UFTCTL_NXMIP_EN));
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BIT(NPCX_UFTCTL_NXMIP_EN));
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}
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}
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static void uart_npcx_clear_rx_fifo(const struct device *dev)
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static void uart_npcx_clear_rx_fifo(const struct device *dev)
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{
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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uint8_t scratch;
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uint8_t scratch;
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/* Read all dummy bytes out from Rx FIFO */
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/* Read all dummy bytes out from Rx FIFO */
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@ -137,7 +141,8 @@ static void uart_npcx_clear_rx_fifo(const struct device *dev)
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static int uart_npcx_fifo_fill(const struct device *dev, const uint8_t *tx_data, int size)
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static int uart_npcx_fifo_fill(const struct device *dev, const uint8_t *tx_data, int size)
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{
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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uint8_t tx_bytes = 0U;
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uint8_t tx_bytes = 0U;
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/* If Tx FIFO is still ready to send */
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/* If Tx FIFO is still ready to send */
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@ -159,7 +164,8 @@ static int uart_npcx_fifo_fill(const struct device *dev, const uint8_t *tx_data,
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static int uart_npcx_fifo_read(const struct device *dev, uint8_t *rx_data, const int size)
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static int uart_npcx_fifo_read(const struct device *dev, uint8_t *rx_data, const int size)
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{
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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unsigned int rx_bytes = 0U;
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unsigned int rx_bytes = 0U;
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/* If least one byte is in the Rx FIFO */
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/* If least one byte is in the Rx FIFO */
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@ -173,14 +179,16 @@ static int uart_npcx_fifo_read(const struct device *dev, uint8_t *rx_data, const
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static void uart_npcx_irq_tx_enable(const struct device *dev)
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static void uart_npcx_irq_tx_enable(const struct device *dev)
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{
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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inst->UFTCTL |= BIT(NPCX_UFTCTL_TEMPTY_EN);
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inst->UFTCTL |= BIT(NPCX_UFTCTL_TEMPTY_EN);
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}
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}
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static void uart_npcx_irq_tx_disable(const struct device *dev)
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static void uart_npcx_irq_tx_disable(const struct device *dev)
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{
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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inst->UFTCTL &= ~(BIT(NPCX_UFTCTL_TEMPTY_EN));
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inst->UFTCTL &= ~(BIT(NPCX_UFTCTL_TEMPTY_EN));
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}
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}
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@ -192,7 +200,8 @@ static int uart_npcx_irq_tx_ready(const struct device *dev)
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static int uart_npcx_irq_tx_complete(const struct device *dev)
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static int uart_npcx_irq_tx_complete(const struct device *dev)
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{
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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/* Tx FIFO is empty or last byte is sending */
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/* Tx FIFO is empty or last byte is sending */
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return IS_BIT_SET(inst->UFTSTS, NPCX_UFTSTS_NXMIP);
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return IS_BIT_SET(inst->UFTSTS, NPCX_UFTSTS_NXMIP);
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@ -200,14 +209,16 @@ static int uart_npcx_irq_tx_complete(const struct device *dev)
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static void uart_npcx_irq_rx_enable(const struct device *dev)
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static void uart_npcx_irq_rx_enable(const struct device *dev)
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{
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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inst->UFRCTL |= BIT(NPCX_UFRCTL_RNEMPTY_EN);
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inst->UFRCTL |= BIT(NPCX_UFRCTL_RNEMPTY_EN);
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}
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}
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static void uart_npcx_irq_rx_disable(const struct device *dev)
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static void uart_npcx_irq_rx_disable(const struct device *dev)
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{
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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inst->UFRCTL &= ~(BIT(NPCX_UFRCTL_RNEMPTY_EN));
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inst->UFRCTL &= ~(BIT(NPCX_UFRCTL_RNEMPTY_EN));
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}
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}
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@ -219,14 +230,16 @@ static int uart_npcx_irq_rx_ready(const struct device *dev)
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static void uart_npcx_irq_err_enable(const struct device *dev)
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static void uart_npcx_irq_err_enable(const struct device *dev)
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{
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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inst->UICTRL |= BIT(NPCX_UICTRL_EEI);
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inst->UICTRL |= BIT(NPCX_UICTRL_EEI);
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}
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}
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static void uart_npcx_irq_err_disable(const struct device *dev)
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static void uart_npcx_irq_err_disable(const struct device *dev)
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{
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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inst->UICTRL &= ~(BIT(NPCX_UICTRL_EEI));
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inst->UICTRL &= ~(BIT(NPCX_UICTRL_EEI));
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}
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}
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@ -273,7 +286,8 @@ static void uart_npcx_isr(const struct device *dev)
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data->user_cb(dev, data->user_data);
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data->user_cb(dev, data->user_data);
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}
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}
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#ifdef CONFIG_PM
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#ifdef CONFIG_PM
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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if (IS_BIT_SET(inst->UFTCTL, NPCX_UFTCTL_NXMIP_EN) &&
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if (IS_BIT_SET(inst->UFTCTL, NPCX_UFTCTL_NXMIP_EN) &&
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IS_BIT_SET(inst->UFTSTS, NPCX_UFTSTS_NXMIP)) {
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IS_BIT_SET(inst->UFTSTS, NPCX_UFTSTS_NXMIP)) {
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@ -310,7 +324,8 @@ static void uart_npcx_poll_out(const struct device *dev, unsigned char c)
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*/
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*/
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static int uart_npcx_poll_in(const struct device *dev, unsigned char *c)
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static int uart_npcx_poll_in(const struct device *dev, unsigned char *c)
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{
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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/* Rx single byte buffer is not full */
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/* Rx single byte buffer is not full */
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if (!IS_BIT_SET(inst->UICTRL, NPCX_UICTRL_RBF))
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if (!IS_BIT_SET(inst->UICTRL, NPCX_UICTRL_RBF))
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@ -325,7 +340,8 @@ static int uart_npcx_poll_in(const struct device *dev, unsigned char *c)
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*/
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*/
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static void uart_npcx_poll_out(const struct device *dev, unsigned char c)
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static void uart_npcx_poll_out(const struct device *dev, unsigned char c)
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{
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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/* Wait while Tx single byte buffer is ready to send */
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/* Wait while Tx single byte buffer is ready to send */
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while (!IS_BIT_SET(inst->UICTRL, NPCX_UICTRL_TBE))
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while (!IS_BIT_SET(inst->UICTRL, NPCX_UICTRL_TBE))
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@ -338,7 +354,8 @@ static void uart_npcx_poll_out(const struct device *dev, unsigned char c)
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/* UART api functions */
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/* UART api functions */
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static int uart_npcx_err_check(const struct device *dev)
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static int uart_npcx_err_check(const struct device *dev)
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{
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct uart_npcx_config *const config = dev->config;
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struct uart_reg *const inst = config->inst;
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uint32_t err = 0U;
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uint32_t err = 0U;
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uint8_t stat = inst->USTAT;
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uint8_t stat = inst->USTAT;
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@ -412,8 +429,8 @@ static int uart_npcx_init(const struct device *dev)
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{
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{
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const struct uart_npcx_config *const config = dev->config;
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const struct uart_npcx_config *const config = dev->config;
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struct uart_npcx_data *const data = dev->data;
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struct uart_npcx_data *const data = dev->data;
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct device *const clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE);
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const struct device *const clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE);
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struct uart_reg *const inst = config->inst;
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uint32_t uart_rate;
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uint32_t uart_rate;
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int ret;
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int ret;
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@ -461,7 +478,7 @@ static int uart_npcx_init(const struct device *dev)
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uart_npcx_clear_rx_fifo(dev);
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uart_npcx_clear_rx_fifo(dev);
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/* Configure UART interrupts */
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/* Configure UART interrupts */
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config->uconf.irq_config_func(dev);
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config->irq_config_func(dev);
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#endif
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#endif
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if (IS_ENABLED(CONFIG_PM)) {
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if (IS_ENABLED(CONFIG_PM)) {
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@ -504,36 +521,36 @@ static int uart_npcx_init(const struct device *dev)
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#define NPCX_UART_IRQ_CONFIG_FUNC(inst)
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#define NPCX_UART_IRQ_CONFIG_FUNC(inst)
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#endif
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#endif
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#define NPCX_UART_INIT(inst) \
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#define NPCX_UART_INIT(i) \
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NPCX_UART_IRQ_CONFIG_FUNC_DECL(inst); \
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NPCX_UART_IRQ_CONFIG_FUNC_DECL(i); \
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\
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\
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static const struct npcx_alt uart_alts##inst[] = NPCX_DT_ALT_ITEMS_LIST(inst); \
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static const struct npcx_alt uart_alts##i[] = NPCX_DT_ALT_ITEMS_LIST(i); \
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\
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\
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static const struct uart_npcx_config uart_npcx_cfg_##inst = { \
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static const struct uart_npcx_config uart_npcx_cfg_##i = { \
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.uconf = { .base = (uint8_t *)DT_INST_REG_ADDR(inst), \
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.inst = (struct uart_reg *)DT_INST_REG_ADDR(i), \
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NPCX_UART_IRQ_CONFIG_FUNC_INIT(inst) }, \
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.clk_cfg = NPCX_DT_CLK_CFG_ITEM(i), \
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.clk_cfg = NPCX_DT_CLK_CFG_ITEM(inst), \
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.uart_rx_wui = NPCX_DT_WUI_ITEM_BY_NAME(0, uart_rx), \
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.uart_rx_wui = NPCX_DT_WUI_ITEM_BY_NAME(0, uart_rx), \
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.alts_size = ARRAY_SIZE(uart_alts##i), \
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.alts_size = ARRAY_SIZE(uart_alts##inst), \
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.alts_list = uart_alts##i, \
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.alts_list = uart_alts##inst, \
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NPCX_UART_IRQ_CONFIG_FUNC_INIT(i) \
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}; \
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}; \
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\
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\
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static struct uart_npcx_data uart_npcx_data_##inst = { .baud_rate = DT_INST_PROP( \
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static struct uart_npcx_data uart_npcx_data_##i = { .baud_rate = DT_INST_PROP( \
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inst, current_speed) }; \
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i, current_speed) }; \
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\
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\
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DEVICE_DT_INST_DEFINE(inst, &uart_npcx_init, NULL, &uart_npcx_data_##inst, \
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DEVICE_DT_INST_DEFINE(i, &uart_npcx_init, NULL, &uart_npcx_data_##i, \
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&uart_npcx_cfg_##inst, PRE_KERNEL_1, CONFIG_SERIAL_INIT_PRIORITY, \
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&uart_npcx_cfg_##i, PRE_KERNEL_1, CONFIG_SERIAL_INIT_PRIORITY, \
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&uart_npcx_driver_api); \
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&uart_npcx_driver_api); \
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\
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\
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NPCX_UART_IRQ_CONFIG_FUNC(inst)
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NPCX_UART_IRQ_CONFIG_FUNC(i)
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DT_INST_FOREACH_STATUS_OKAY(NPCX_UART_INIT)
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DT_INST_FOREACH_STATUS_OKAY(NPCX_UART_INIT)
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#define ENABLE_MIWU_CRIN_IRQ(inst) \
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#define ENABLE_MIWU_CRIN_IRQ(i) \
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npcx_miwu_irq_get_and_clear_pending(&uart_npcx_cfg_##inst.uart_rx_wui); \
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npcx_miwu_irq_get_and_clear_pending(&uart_npcx_cfg_##i.uart_rx_wui); \
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npcx_miwu_irq_enable(&uart_npcx_cfg_##inst.uart_rx_wui);
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npcx_miwu_irq_enable(&uart_npcx_cfg_##i.uart_rx_wui);
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#define DISABLE_MIWU_CRIN_IRQ(inst) npcx_miwu_irq_disable(&uart_npcx_cfg_##inst.uart_rx_wui);
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#define DISABLE_MIWU_CRIN_IRQ(i) npcx_miwu_irq_disable(&uart_npcx_cfg_##i.uart_rx_wui);
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||||||
void npcx_uart_enable_access_interrupt(void)
|
void npcx_uart_enable_access_interrupt(void)
|
||||||
{
|
{
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue