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boards: m5stack: cores3: Add CoreS3 SE variant

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Add `se` variant to support the low-cost CoreS3 SE.

- Add configuration files
  Add `m5stack_cores3_procpu_se(.dts|.yaml|defconfig)` files.
  Reorganize dts files to split common parts.

- Update .yaml file
  Add gpio, can, counter, entropy, pwm, and pinmux to the supported
  feature group. Remove the `ignore_tags:` section.

- Update documents
  Add and modify information about CoreS3 SE.
  Add more description about sysbuild.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
This commit is contained in:
TOKITA Hiroshi 2024-10-17 07:25:48 +09:00 • committed by Fabio Baltieri
commit 855e583624
11 changed files with 293 additions and 81 deletions
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3
boards/m5stack/m5stack_cores3/Kconfig
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@ -3,5 +3,6 @@
config HEAP_MEM_POOL_ADD_SIZE_BOARD
int
default 4096 if BOARD_M5STACK_CORES3_ESP32S3_PROCPU
default 4096 if BOARD_M5STACK_CORES3_ESP32S3_PROCPU || \
BOARD_M5STACK_CORES3_ESP32S3_PROCPU_SE
default 256 if BOARD_M5STACK_CORES3_ESP32S3_APPCPU

3
boards/m5stack/m5stack_cores3/Kconfig.m5stack_cores3
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@ -5,5 +5,6 @@
config BOARD_M5STACK_CORES3
select SOC_ESP32S3
select SOC_ESP32S3_PROCPU if BOARD_M5STACK_CORES3_ESP32S3_PROCPU
select SOC_ESP32S3_PROCPU if BOARD_M5STACK_CORES3_ESP32S3_PROCPU || \
BOARD_M5STACK_CORES3_ESP32S3_PROCPU_SE
select SOC_ESP32S3_APPCPU if BOARD_M5STACK_CORES3_ESP32S3_APPCPU

3
boards/m5stack/m5stack_cores3/board.yml
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@ -4,3 +4,6 @@ board:
vendor: m5stack
socs:
- name: esp32s3
variants:
- name: se
cpucluster: procpu

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182
boards/m5stack/m5stack_cores3/doc/index.rst
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@ -4,25 +4,27 @@ Overview
********
M5Stack CoreS3 is an ESP32-based development board from M5Stack. It is the third generation of the M5Stack Core series.
M5Stack CoreS3 SE is the compact version of CoreS3. It has the same form factor as the original M5Stack,
and some features were reduced from CoreS3.
M5Stack CoreS3 features consist of:
M5Stack CoreS3/CoreS3 SE features consist of:
- ESP32-S3 chip (dual-core Xtensa LX7 processor @240MHz, WIFI, OTG and CDC functions)
- PSRAM 8MB
- Flash 16MB
- LCD ISP 2", 320x240 pixel ILI9342C
- Capacitive multi touch FT6336U
- Camera 30W pixel GC0308
- Speaker 1W AW88298
- Dual Microphones ES7210 Audio decoder
- RTC BM8563
- USB-C
- SD-Card slot
- Geomagnetic sensor BMM150
- Proximity sensor LTR-553ALS-WA
- 6-Axis IMU BMI270
- PMIC AXP2101
- Battery 500mAh 3.7 V
- Battery 500mAh 3.7 V (Not available for CoreS3 SE)
- Camera 30W pixel GC0308 (Not available for CoreS3 SE)
- Geomagnetic sensor BMM150 (Not available for CoreS3 SE)
- Proximity sensor LTR-553ALS-WA (Not available for CoreS3 SE)
- 6-Axis IMU BMI270 (Not available for CoreS3 SE)
Start Application Development
*****************************
@ -48,25 +50,146 @@ below to retrieve those files.
It is recommended running the command above after :file:`west update`.
Building & Flashing
-------------------
*******************
Simple boot
===========
The board could be loaded using the single binary image, without 2nd stage bootloader.
It is the default option when building the application without additional configuration.
.. note::
Simple boot does not provide any security features nor OTA updates.
MCUboot bootloader
==================
User may choose to use MCUboot bootloader instead. In that case the bootloader
must be built (and flashed) at least once.
There are two options to be used when building an application:
1. Sysbuild
2. Manual build
.. note::
User can select the MCUboot bootloader by adding the following line
to the board default configuration file.
.. code:: cfg
CONFIG_BOOTLOADER_MCUBOOT=y
Sysbuild
========
The sysbuild makes possible to build and flash all necessary images needed to
bootstrap the board with the ESP32 SoC.
To build the sample application using sysbuild use the command:
.. tabs::
.. group-tab:: M5Stack CoreS3
.. zephyr-app-commands::
:tool: west
:zephyr-app: samples/hello_world
:board: m5stack_cores3/esp32s3/procpu
:goals: build
:west-args: --sysbuild
:compact:
.. group-tab:: M5Stack CoreS3 SE
.. zephyr-app-commands::
:tool: west
:zephyr-app: samples/hello_world
:board: m5stack_cores3/esp32s3/procpu/se
:goals: build
:west-args: --sysbuild
:compact:
By default, the ESP32 sysbuild creates bootloader (MCUboot) and application
images. But it can be configured to create other kind of images.
Build directory structure created by sysbuild is different from traditional
Zephyr build. Output is structured by the domain subdirectories:
.. code-block::
build/
├── hello_world
│ └── zephyr
│ ├── zephyr.elf
│ └── zephyr.bin
├── mcuboot
│ └── zephyr
│ ├── zephyr.elf
│ └── zephyr.bin
└── domains.yaml
.. note::
With ``--sysbuild`` option the bootloader will be re-build and re-flash
every time the pristine build is used.
For more information about the system build please read the :ref:`sysbuild` documentation.
Manual build
============
During the development cycle, it is intended to build & flash as quickly possible.
For that reason, images can be built one at a time using traditional build.
The instructions following are relevant for both manual build and sysbuild.
The only difference is the structure of the build directory.
.. note::
Remember that bootloader (MCUboot) needs to be flash at least once.
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
.. zephyr-app-commands::
.. tabs::
.. group-tab:: M5Stack CoreS3
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_cores3/esp32s3/procpu
:goals: build
.. group-tab:: M5Stack CoreS3 SE
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_cores3/esp32s3/procpu/se
:goals: build
The usual ``flash`` target will work with the ``m5stack_cores3/esp32s3/procpu`` board
configuration. Here is an example for the :zephyr:code-sample:`hello_world`
application.
.. zephyr-app-commands::
.. tabs::
.. group-tab:: M5Stack CoreS3
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_cores3/esp32s3/procpu
:goals: flash
.. group-tab:: M5Stack CoreS3 SE
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_cores3/esp32s3/procpu/se
:goals: flash
The baud rate of 921600bps is set by default. If experiencing issues when flashing,
try using different values by using ``--esp-baud-rate <BAUD>`` option during
``west flash`` (e.g. ``west flash --esp-baud-rate 115200``).
@ -85,9 +208,8 @@ message in the monitor:
*** Booting Zephyr OS build vx.x.x-xxx-gxxxxxxxxxxxx ***
Hello World! m5stack_cores3/esp32s3/procpu
Debugging
---------
*********
ESP32-S3 support on OpenOCD is available at `OpenOCD ESP32`_.
@ -95,6 +217,42 @@ ESP32-S3 has a built-in JTAG circuitry and can be debugged without any additiona
Further documentation can be obtained from the SoC vendor in `JTAG debugging for ESP32-S3`_.
Here is an example for building the :zephyr:code-sample:`hello_world` application.
.. tabs::
.. group-tab:: M5Stack CoreS3
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_cores3/esp32s3/procpu
:goals: debug
.. group-tab:: M5Stack CoreS3 SE
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_cores3/esp32s3/procpu/se
:goals: debug
You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application.
.. tabs::
.. group-tab:: M5Stack CoreS3
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_cores3/esp32s3/procpu
:goals: debug
.. group-tab:: M5Stack CoreS3 SE
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_cores3/esp32s3/procpu/se
:goals: debug
References
**********
@ -102,5 +260,7 @@ References
.. _`M5Stack CoreS3 Documentation`: http://docs.m5stack.com/en/core/CoreS3
.. _`M5Stack CoreS3 Schematic`: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/K128%20CoreS3/Sch_M5_CoreS3_v1.0.pdf
.. _`M5Stack CoreS3 SE Documentation`: https://docs.m5stack.com/en/core/M5CoreS3%20SE
.. _`M5Stack CoreS3 SE Schematic`: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/products/core/M5CORES3%20SE/M5_CoreS3SE.pdf
.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases
.. _`JTAG debugging for ESP32-S3`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/jtag-debugging/

54
boards/m5stack/m5stack_cores3/m5stack_cores3_procpu.dts
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@ -1,53 +1,24 @@
/*
* Copyright (c) 2024 Zhang Xingtao <zhxt@live.cn>
* Copyright (c) 2024 TOKITA Hiroshi
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <espressif/esp32s3/esp32s3_wroom_n16r8.dtsi>
#include <espressif/partitions_0x0_amp.dtsi>
#include "m5stack_cores3-pinctrl.dtsi"
#include "m5stack_cores3_procpu_common.dtsi"
/ {
model = "M5Stack CoreS3 PROCPU";
compatible = "m5stack,cores3";
chosen {
zephyr,sram = &sram0;
zephyr,console = &usb_serial;
zephyr,shell-uart = &usb_serial;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,bt-hci = &esp32_bt_hci;
};
aliases {
i2c-0 = &i2c0;
watchdog0 = &wdt0;
accel0 = &bmi270;
magn0 = &bmm150;
};
};
&usb_serial {
status = "okay";
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>;
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
bmi270: bmi270@69 {
compatible = "bosch,bmi270";
reg = <0x69>;
@ -59,24 +30,3 @@
reg = <0x10>;
};
};
&spi2 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spim2_default>;
pinctrl-names = "default";
};
&wdt0 {
status = "okay";
};
&psram0 {
reg = <0x3c000000 DT_SIZE_M(8)>;
status = "okay";
};
&esp32_bt_hci {
status = "okay";
};

16
boards/m5stack/m5stack_cores3/m5stack_cores3_procpu.yaml
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@ -5,17 +5,15 @@ arch: xtensa
toolchain:
- zephyr
supported:
- dma
- gpio
- uart
- i2c
- spi
- uart
- can
- counter
- watchdog
testing:
ignore_tags:
- bluetooth
- gpio
- net
- pinmux
- entropy
- pwm
- regulator
- dma
- pinmux
vendor: m5stack

59
boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_common.dtsi Normal file
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@ -0,0 +1,59 @@
/*
* Copyright (c) 2024 Zhang Xingtao <zhxt@live.cn>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <espressif/esp32s3/esp32s3_wroom_n16r8.dtsi>
#include <espressif/partitions_0x0_amp.dtsi>
#include "m5stack_cores3-pinctrl.dtsi"
/ {
chosen {
zephyr,sram = &sram0;
zephyr,console = &usb_serial;
zephyr,shell-uart = &usb_serial;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,bt-hci = &esp32_bt_hci;
};
aliases {
i2c-0 = &i2c0;
watchdog0 = &wdt0;
};
};
&usb_serial {
status = "okay";
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>;
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
};
&spi2 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spim2_default>;
pinctrl-names = "default";
};
&wdt0 {
status = "okay";
};
&esp32_bt_hci {
status = "okay";
};

14
boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_se.dts Normal file
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@ -0,0 +1,14 @@
/*
* Copyright (c) 2024 TOKITA Hiroshi
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include "m5stack_cores3_procpu_common.dtsi"
/ {
model = "M5Stack CoreS3 SE PROCPU";
compatible = "m5stack,cores3-se";
};

19
boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_se.yaml Normal file
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@ -0,0 +1,19 @@
identifier: m5stack_cores3/esp32s3/procpu/se
name: M5Stack CoreS3 SE PROCPU
type: mcu
arch: xtensa
toolchain:
- zephyr
supported:
- gpio
- uart
- i2c
- spi
- can
- counter
- watchdog
- entropy
- pwm
- dma
- pinmux
vendor: m5stack

7
boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_se_defconfig Normal file
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@ -0,0 +1,7 @@
# SPDX-License-Identifier: Apache-2.0
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_GPIO=y