boards: m5stack: cores3: Add CoreS3 SE variant
Add `se` variant to support the low-cost CoreS3 SE. - Add configuration files Add `m5stack_cores3_procpu_se(.dts|.yaml|defconfig)` files. Reorganize dts files to split common parts. - Update .yaml file Add gpio, can, counter, entropy, pwm, and pinmux to the supported feature group. Remove the `ignore_tags:` section. - Update documents Add and modify information about CoreS3 SE. Add more description about sysbuild. Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
This commit is contained in:
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11 changed files with 293 additions and 81 deletions
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@ -3,5 +3,6 @@
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config HEAP_MEM_POOL_ADD_SIZE_BOARD
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config HEAP_MEM_POOL_ADD_SIZE_BOARD
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int
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int
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default 4096 if BOARD_M5STACK_CORES3_ESP32S3_PROCPU
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default 4096 if BOARD_M5STACK_CORES3_ESP32S3_PROCPU || \
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BOARD_M5STACK_CORES3_ESP32S3_PROCPU_SE
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default 256 if BOARD_M5STACK_CORES3_ESP32S3_APPCPU
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default 256 if BOARD_M5STACK_CORES3_ESP32S3_APPCPU
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@ -5,5 +5,6 @@
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config BOARD_M5STACK_CORES3
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config BOARD_M5STACK_CORES3
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select SOC_ESP32S3
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select SOC_ESP32S3
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select SOC_ESP32S3_PROCPU if BOARD_M5STACK_CORES3_ESP32S3_PROCPU
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select SOC_ESP32S3_PROCPU if BOARD_M5STACK_CORES3_ESP32S3_PROCPU || \
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BOARD_M5STACK_CORES3_ESP32S3_PROCPU_SE
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select SOC_ESP32S3_APPCPU if BOARD_M5STACK_CORES3_ESP32S3_APPCPU
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select SOC_ESP32S3_APPCPU if BOARD_M5STACK_CORES3_ESP32S3_APPCPU
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@ -4,3 +4,6 @@ board:
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vendor: m5stack
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vendor: m5stack
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socs:
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socs:
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- name: esp32s3
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- name: esp32s3
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variants:
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- name: se
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cpucluster: procpu
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BIN
boards/m5stack/m5stack_cores3/doc/img/m5stack_cores3_se.webp
Normal file
BIN
boards/m5stack/m5stack_cores3/doc/img/m5stack_cores3_se.webp
Normal file
Binary file not shown.
After Width: | Height: | Size: 49 KiB |
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@ -4,25 +4,27 @@ Overview
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********
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********
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M5Stack CoreS3 is an ESP32-based development board from M5Stack. It is the third generation of the M5Stack Core series.
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M5Stack CoreS3 is an ESP32-based development board from M5Stack. It is the third generation of the M5Stack Core series.
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M5Stack CoreS3 SE is the compact version of CoreS3. It has the same form factor as the original M5Stack,
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and some features were reduced from CoreS3.
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M5Stack CoreS3 features consist of:
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M5Stack CoreS3/CoreS3 SE features consist of:
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- ESP32-S3 chip (dual-core Xtensa LX7 processor @240MHz, WIFI, OTG and CDC functions)
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- ESP32-S3 chip (dual-core Xtensa LX7 processor @240MHz, WIFI, OTG and CDC functions)
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- PSRAM 8MB
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- PSRAM 8MB
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- Flash 16MB
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- Flash 16MB
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- LCD ISP 2", 320x240 pixel ILI9342C
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- LCD ISP 2", 320x240 pixel ILI9342C
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- Capacitive multi touch FT6336U
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- Capacitive multi touch FT6336U
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- Camera 30W pixel GC0308
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- Speaker 1W AW88298
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- Speaker 1W AW88298
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- Dual Microphones ES7210 Audio decoder
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- Dual Microphones ES7210 Audio decoder
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- RTC BM8563
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- RTC BM8563
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- USB-C
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- USB-C
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- SD-Card slot
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- SD-Card slot
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- Geomagnetic sensor BMM150
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- Proximity sensor LTR-553ALS-WA
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- 6-Axis IMU BMI270
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- PMIC AXP2101
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- PMIC AXP2101
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- Battery 500mAh 3.7 V
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- Battery 500mAh 3.7 V (Not available for CoreS3 SE)
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- Camera 30W pixel GC0308 (Not available for CoreS3 SE)
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- Geomagnetic sensor BMM150 (Not available for CoreS3 SE)
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- Proximity sensor LTR-553ALS-WA (Not available for CoreS3 SE)
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- 6-Axis IMU BMI270 (Not available for CoreS3 SE)
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Start Application Development
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Start Application Development
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*****************************
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*****************************
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@ -48,24 +50,145 @@ below to retrieve those files.
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It is recommended running the command above after :file:`west update`.
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It is recommended running the command above after :file:`west update`.
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Building & Flashing
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Building & Flashing
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-------------------
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*******************
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Simple boot
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===========
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The board could be loaded using the single binary image, without 2nd stage bootloader.
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It is the default option when building the application without additional configuration.
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.. note::
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Simple boot does not provide any security features nor OTA updates.
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MCUboot bootloader
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==================
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User may choose to use MCUboot bootloader instead. In that case the bootloader
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must be built (and flashed) at least once.
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There are two options to be used when building an application:
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1. Sysbuild
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2. Manual build
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.. note::
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User can select the MCUboot bootloader by adding the following line
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to the board default configuration file.
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.. code:: cfg
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CONFIG_BOOTLOADER_MCUBOOT=y
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Sysbuild
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========
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The sysbuild makes possible to build and flash all necessary images needed to
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bootstrap the board with the ESP32 SoC.
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To build the sample application using sysbuild use the command:
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.. tabs::
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.. group-tab:: M5Stack CoreS3
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.. zephyr-app-commands::
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:tool: west
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:zephyr-app: samples/hello_world
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:board: m5stack_cores3/esp32s3/procpu
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:goals: build
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:west-args: --sysbuild
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:compact:
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.. group-tab:: M5Stack CoreS3 SE
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.. zephyr-app-commands::
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:tool: west
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:zephyr-app: samples/hello_world
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:board: m5stack_cores3/esp32s3/procpu/se
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:goals: build
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:west-args: --sysbuild
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:compact:
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By default, the ESP32 sysbuild creates bootloader (MCUboot) and application
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images. But it can be configured to create other kind of images.
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Build directory structure created by sysbuild is different from traditional
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Zephyr build. Output is structured by the domain subdirectories:
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.. code-block::
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build/
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├── hello_world
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│ └── zephyr
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│ ├── zephyr.elf
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│ └── zephyr.bin
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├── mcuboot
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│ └── zephyr
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│ ├── zephyr.elf
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│ └── zephyr.bin
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└── domains.yaml
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.. note::
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With ``--sysbuild`` option the bootloader will be re-build and re-flash
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every time the pristine build is used.
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For more information about the system build please read the :ref:`sysbuild` documentation.
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Manual build
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============
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During the development cycle, it is intended to build & flash as quickly possible.
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For that reason, images can be built one at a time using traditional build.
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The instructions following are relevant for both manual build and sysbuild.
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The only difference is the structure of the build directory.
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.. note::
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Remember that bootloader (MCUboot) needs to be flash at least once.
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Build and flash applications as usual (see :ref:`build_an_application` and
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Build and flash applications as usual (see :ref:`build_an_application` and
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:ref:`application_run` for more details).
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:ref:`application_run` for more details).
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.. zephyr-app-commands::
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.. tabs::
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:zephyr-app: samples/hello_world
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:board: m5stack_cores3/esp32s3/procpu
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.. group-tab:: M5Stack CoreS3
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:goals: build
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: m5stack_cores3/esp32s3/procpu
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:goals: build
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.. group-tab:: M5Stack CoreS3 SE
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: m5stack_cores3/esp32s3/procpu/se
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:goals: build
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The usual ``flash`` target will work with the ``m5stack_cores3/esp32s3/procpu`` board
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The usual ``flash`` target will work with the ``m5stack_cores3/esp32s3/procpu`` board
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configuration. Here is an example for the :zephyr:code-sample:`hello_world`
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configuration. Here is an example for the :zephyr:code-sample:`hello_world`
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application.
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application.
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.. zephyr-app-commands::
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.. tabs::
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:zephyr-app: samples/hello_world
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:board: m5stack_cores3/esp32s3/procpu
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.. group-tab:: M5Stack CoreS3
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:goals: flash
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: m5stack_cores3/esp32s3/procpu
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:goals: flash
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.. group-tab:: M5Stack CoreS3 SE
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: m5stack_cores3/esp32s3/procpu/se
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:goals: flash
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The baud rate of 921600bps is set by default. If experiencing issues when flashing,
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The baud rate of 921600bps is set by default. If experiencing issues when flashing,
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try using different values by using ``--esp-baud-rate <BAUD>`` option during
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try using different values by using ``--esp-baud-rate <BAUD>`` option during
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@ -85,9 +208,8 @@ message in the monitor:
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*** Booting Zephyr OS build vx.x.x-xxx-gxxxxxxxxxxxx ***
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*** Booting Zephyr OS build vx.x.x-xxx-gxxxxxxxxxxxx ***
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Hello World! m5stack_cores3/esp32s3/procpu
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Hello World! m5stack_cores3/esp32s3/procpu
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Debugging
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Debugging
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---------
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*********
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ESP32-S3 support on OpenOCD is available at `OpenOCD ESP32`_.
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ESP32-S3 support on OpenOCD is available at `OpenOCD ESP32`_.
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@ -95,6 +217,42 @@ ESP32-S3 has a built-in JTAG circuitry and can be debugged without any additiona
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Further documentation can be obtained from the SoC vendor in `JTAG debugging for ESP32-S3`_.
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Further documentation can be obtained from the SoC vendor in `JTAG debugging for ESP32-S3`_.
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Here is an example for building the :zephyr:code-sample:`hello_world` application.
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.. tabs::
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.. group-tab:: M5Stack CoreS3
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: m5stack_cores3/esp32s3/procpu
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:goals: debug
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.. group-tab:: M5Stack CoreS3 SE
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: m5stack_cores3/esp32s3/procpu/se
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:goals: debug
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You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application.
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.. tabs::
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.. group-tab:: M5Stack CoreS3
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: m5stack_cores3/esp32s3/procpu
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:goals: debug
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.. group-tab:: M5Stack CoreS3 SE
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: m5stack_cores3/esp32s3/procpu/se
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:goals: debug
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References
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References
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**********
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**********
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@ -102,5 +260,7 @@ References
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.. _`M5Stack CoreS3 Documentation`: http://docs.m5stack.com/en/core/CoreS3
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.. _`M5Stack CoreS3 Documentation`: http://docs.m5stack.com/en/core/CoreS3
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.. _`M5Stack CoreS3 Schematic`: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/K128%20CoreS3/Sch_M5_CoreS3_v1.0.pdf
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.. _`M5Stack CoreS3 Schematic`: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/K128%20CoreS3/Sch_M5_CoreS3_v1.0.pdf
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.. _`M5Stack CoreS3 SE Documentation`: https://docs.m5stack.com/en/core/M5CoreS3%20SE
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.. _`M5Stack CoreS3 SE Schematic`: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/products/core/M5CORES3%20SE/M5_CoreS3SE.pdf
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.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases
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.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases
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.. _`JTAG debugging for ESP32-S3`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/jtag-debugging/
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.. _`JTAG debugging for ESP32-S3`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/jtag-debugging/
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/*
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/*
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* Copyright (c) 2024 Zhang Xingtao <zhxt@live.cn>
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* Copyright (c) 2024 TOKITA Hiroshi
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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/dts-v1/;
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/dts-v1/;
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#include <espressif/esp32s3/esp32s3_wroom_n16r8.dtsi>
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#include "m5stack_cores3_procpu_common.dtsi"
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#include <espressif/partitions_0x0_amp.dtsi>
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#include "m5stack_cores3-pinctrl.dtsi"
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/ {
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/ {
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model = "M5Stack CoreS3 PROCPU";
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model = "M5Stack CoreS3 PROCPU";
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compatible = "m5stack,cores3";
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compatible = "m5stack,cores3";
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chosen {
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zephyr,sram = &sram0;
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zephyr,console = &usb_serial;
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zephyr,shell-uart = &usb_serial;
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zephyr,flash = &flash0;
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zephyr,code-partition = &slot0_partition;
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zephyr,bt-hci = &esp32_bt_hci;
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};
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aliases {
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aliases {
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i2c-0 = &i2c0;
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watchdog0 = &wdt0;
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accel0 = &bmi270;
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accel0 = &bmi270;
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magn0 = &bmm150;
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magn0 = &bmm150;
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};
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};
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};
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};
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&usb_serial {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&uart0_default>;
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pinctrl-names = "default";
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};
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&i2c0 {
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&i2c0 {
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status = "okay";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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pinctrl-0 = <&i2c0_default>;
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pinctrl-names = "default";
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bmi270: bmi270@69 {
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bmi270: bmi270@69 {
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compatible = "bosch,bmi270";
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compatible = "bosch,bmi270";
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reg = <0x69>;
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reg = <0x69>;
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@ -59,24 +30,3 @@
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reg = <0x10>;
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reg = <0x10>;
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};
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};
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};
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};
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&spi2 {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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pinctrl-0 = <&spim2_default>;
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|
||||||
pinctrl-names = "default";
|
|
||||||
};
|
|
||||||
|
|
||||||
&wdt0 {
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&psram0 {
|
|
||||||
reg = <0x3c000000 DT_SIZE_M(8)>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&esp32_bt_hci {
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
|
@ -5,17 +5,15 @@ arch: xtensa
|
||||||
toolchain:
|
toolchain:
|
||||||
- zephyr
|
- zephyr
|
||||||
supported:
|
supported:
|
||||||
- dma
|
- gpio
|
||||||
|
- uart
|
||||||
- i2c
|
- i2c
|
||||||
- spi
|
- spi
|
||||||
- uart
|
- can
|
||||||
|
- counter
|
||||||
- watchdog
|
- watchdog
|
||||||
testing:
|
- entropy
|
||||||
ignore_tags:
|
- pwm
|
||||||
- bluetooth
|
- dma
|
||||||
- gpio
|
- pinmux
|
||||||
- net
|
|
||||||
- pinmux
|
|
||||||
- pwm
|
|
||||||
- regulator
|
|
||||||
vendor: m5stack
|
vendor: m5stack
|
||||||
|
|
|
@ -0,0 +1,59 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2024 Zhang Xingtao <zhxt@live.cn>
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <espressif/esp32s3/esp32s3_wroom_n16r8.dtsi>
|
||||||
|
#include <espressif/partitions_0x0_amp.dtsi>
|
||||||
|
#include "m5stack_cores3-pinctrl.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
chosen {
|
||||||
|
zephyr,sram = &sram0;
|
||||||
|
zephyr,console = &usb_serial;
|
||||||
|
zephyr,shell-uart = &usb_serial;
|
||||||
|
zephyr,flash = &flash0;
|
||||||
|
zephyr,code-partition = &slot0_partition;
|
||||||
|
zephyr,bt-hci = &esp32_bt_hci;
|
||||||
|
};
|
||||||
|
|
||||||
|
aliases {
|
||||||
|
i2c-0 = &i2c0;
|
||||||
|
watchdog0 = &wdt0;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&usb_serial {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&uart0 {
|
||||||
|
status = "okay";
|
||||||
|
current-speed = <115200>;
|
||||||
|
pinctrl-0 = <&uart0_default>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c0 {
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <I2C_BITRATE_STANDARD>;
|
||||||
|
pinctrl-0 = <&i2c0_default>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
};
|
||||||
|
|
||||||
|
&spi2 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
status = "okay";
|
||||||
|
pinctrl-0 = <&spim2_default>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
};
|
||||||
|
|
||||||
|
&wdt0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&esp32_bt_hci {
|
||||||
|
status = "okay";
|
||||||
|
};
|
14
boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_se.dts
Normal file
14
boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_se.dts
Normal file
|
@ -0,0 +1,14 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2024 TOKITA Hiroshi
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
#include "m5stack_cores3_procpu_common.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "M5Stack CoreS3 SE PROCPU";
|
||||||
|
compatible = "m5stack,cores3-se";
|
||||||
|
};
|
19
boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_se.yaml
Normal file
19
boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_se.yaml
Normal file
|
@ -0,0 +1,19 @@
|
||||||
|
identifier: m5stack_cores3/esp32s3/procpu/se
|
||||||
|
name: M5Stack CoreS3 SE PROCPU
|
||||||
|
type: mcu
|
||||||
|
arch: xtensa
|
||||||
|
toolchain:
|
||||||
|
- zephyr
|
||||||
|
supported:
|
||||||
|
- gpio
|
||||||
|
- uart
|
||||||
|
- i2c
|
||||||
|
- spi
|
||||||
|
- can
|
||||||
|
- counter
|
||||||
|
- watchdog
|
||||||
|
- entropy
|
||||||
|
- pwm
|
||||||
|
- dma
|
||||||
|
- pinmux
|
||||||
|
vendor: m5stack
|
|
@ -0,0 +1,7 @@
|
||||||
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
|
||||||
|
CONFIG_MAIN_STACK_SIZE=2048
|
||||||
|
CONFIG_CONSOLE=y
|
||||||
|
CONFIG_SERIAL=y
|
||||||
|
CONFIG_UART_CONSOLE=y
|
||||||
|
CONFIG_GPIO=y
|
Loading…
Add table
Add a link
Reference in a new issue