diff --git a/soc/riscv/openisa_rv32m1/CMakeLists.txt b/soc/riscv/openisa_rv32m1/CMakeLists.txt
index 433ac777519..d9f1e6d82eb 100644
--- a/soc/riscv/openisa_rv32m1/CMakeLists.txt
+++ b/soc/riscv/openisa_rv32m1/CMakeLists.txt
@@ -18,3 +18,5 @@ zephyr_sources(
   wdog.S
   soc.c
 )
+
+zephyr_linker_sources(TEXT_START SORT_KEY 0x0vectors vector_table.ld)
diff --git a/soc/riscv/openisa_rv32m1/linker.ld b/soc/riscv/openisa_rv32m1/linker.ld
index b6da378f81d..1689093abd4 100644
--- a/soc/riscv/openisa_rv32m1/linker.ld
+++ b/soc/riscv/openisa_rv32m1/linker.ld
@@ -103,39 +103,14 @@ SECTIONS
 
     SECTION_PROLOGUE(_TEXT_SECTION_NAME,,)
 	{
-	/*
-	 * Respect for CONFIG_TEXT_SECTION_OFFSET is mandatory
-	 * for MCUboot support, so .reset.* and .exception.*
-	 * must come after that offset from ROM_BASE.
-	 */
-
-#ifdef CONFIG_BOOTLOADER_MCUBOOT
-	/*
-	 * For CONFIG_BOOTLOADER_MCUBOOT, the vector table is located at the
-	 * end of the image header of the MCUboot. After the tagert image is
-	 * boot, the register Machine Trap-Vector Base Address (MTVEC) is
-	 * set with the value of _vector_start in the reset handler.
-	 */
-	_vector_start = .;
-	KEEP(*(.vectors.*))
-	_vector_end = .;
-	. = ALIGN(4);
-#endif
-
-	KEEP(*(.reset.*))
-	KEEP(*(".exception.entry.*")) /* contains __irq_wrapper */
-	*(".exception.other.*")
-
-	KEEP(*(.openocd_debug))
-	KEEP(*(".openocd_debug.*"))
-
-	_image_text_start = .;
 
 /* Located in generated directory. This file is populated by the
  * zephyr_linker_sources() Cmake function.
  */
 #include <snippets-text-start.ld>
 
+	_image_text_start = .;
+
 	*(.text .text.*)
 	*(.gnu.linkonce.t.*)
 	*(.eh_frame)
diff --git a/soc/riscv/openisa_rv32m1/vector_table.ld b/soc/riscv/openisa_rv32m1/vector_table.ld
new file mode 100644
index 00000000000..2e4c2d0f062
--- /dev/null
+++ b/soc/riscv/openisa_rv32m1/vector_table.ld
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2019 Foundries.io Ltd
+ * Copyright (c) 2019 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+ * Respect for CONFIG_TEXT_SECTION_OFFSET is mandatory
+ * for MCUboot support, so .reset.* and .exception.*
+ * must come after that offset from ROM_BASE.
+ */
+
+#ifdef CONFIG_BOOTLOADER_MCUBOOT
+	/*
+	 * For CONFIG_BOOTLOADER_MCUBOOT, the vector table is located at the
+	 * end of the image header of the MCUboot. After the tagert image is
+	 * boot, the register Machine Trap-Vector Base Address (MTVEC) is
+	 * set with the value of _vector_start in the reset handler.
+	 */
+	_vector_start = .;
+	KEEP(*(.vectors.*))
+	_vector_end = .;
+	. = ALIGN(4);
+#endif
+
+KEEP(*(.reset.*))
+KEEP(*(".exception.entry.*")) /* contains __irq_wrapper */
+*(".exception.other.*")
+
+KEEP(*(.openocd_debug))
+KEEP(*(".openocd_debug.*"))