boards: nxp/frdm_mcxn947: Support lpadc for NXP frdm_mcxn947
Support lpadc for NXP frdm_mcxn947 Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
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6 changed files with 26 additions and 0 deletions
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@ -210,6 +210,11 @@ static int frdm_mcxn947_init(void)
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SPC_EnableActiveModeAnalogModules(SPC0, kSPC_controlVref);
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SPC_EnableActiveModeAnalogModules(SPC0, kSPC_controlVref);
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#endif
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpadc0), okay)
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CLOCK_SetClkDiv(kCLOCK_DivAdc0Clk, 1U);
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CLOCK_AttachClk(kFRO_HF_to_ADC0);
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#endif
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/* Set SystemCoreClock variable. */
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/* Set SystemCoreClock variable. */
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SystemCoreClock = CLOCK_INIT_CORE_CLOCK;
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SystemCoreClock = CLOCK_INIT_CORE_CLOCK;
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@ -86,6 +86,8 @@ The FRDM-MCXN947 board configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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+-----------+------------+-------------------------------------+
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| VREF | on-chip | REGULATOR |
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| VREF | on-chip | REGULATOR |
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+-----------+------------+-------------------------------------+
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+-----------+------------+-------------------------------------+
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| ADC | on-chip | adc |
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+-----------+------------+-------------------------------------+
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Targets available
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Targets available
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==================
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==================
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@ -148,4 +148,13 @@
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input-enable;
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input-enable;
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};
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};
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};
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};
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pinmux_lpadc0: pinmux_lpadc0 {
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group0 {
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pinmux = <ADC0_A2_PIO4_23>,
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<ADC0_A1_PIO4_15>,
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<ADC0_B1_PIO4_19>;
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slew-rate = "fast";
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drive-strength = "low";
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};
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};
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};
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};
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@ -183,3 +183,8 @@
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pinctrl-names = "default", "slow", "med";
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pinctrl-names = "default", "slow", "med";
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no-1-8-v;
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no-1-8-v;
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};
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};
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&lpadc0 {
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pinctrl-0 = <&pinmux_lpadc0>;
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pinctrl-names = "default";
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};
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@ -157,3 +157,7 @@
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&vref {
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&vref {
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status = "okay";
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status = "okay";
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};
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};
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&lpadc0 {
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status = "okay";
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};
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@ -25,4 +25,5 @@ supported:
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- counter
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- counter
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- sdhc
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- sdhc
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- regulator
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- regulator
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- adc
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vendor: nxp
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vendor: nxp
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