diff --git a/boards/arm/mimxrt595_evk/board.c b/boards/arm/mimxrt595_evk/board.c index 3322f75d48b..8adf39cf313 100644 --- a/boards/arm/mimxrt595_evk/board.c +++ b/boards/arm/mimxrt595_evk/board.c @@ -5,6 +5,7 @@ #include #include "fsl_power.h" +#include #if CONFIG_REGULATOR #include @@ -71,6 +72,9 @@ static int board_config_pmic(const struct device *dev) return ret; } + /* We can enter deep low power modes */ + pm_policy_state_lock_put(PM_STATE_SUSPEND_TO_IDLE, PM_ALL_SUBSTATES); + return ret; } #endif @@ -88,6 +92,9 @@ static int mimxrt595_evk_init(const struct device *dev) POWER_SetPadVolRange(&vrange); + /* Do not enter deep low power modes until the PMIC modes have been initialized */ + pm_policy_state_lock_get(PM_STATE_SUSPEND_TO_IDLE, PM_ALL_SUBSTATES); + return 0; } diff --git a/boards/arm/mimxrt595_evk/doc/index.rst b/boards/arm/mimxrt595_evk/doc/index.rst index 749046a1dac..3e636645100 100644 --- a/boards/arm/mimxrt595_evk/doc/index.rst +++ b/boards/arm/mimxrt595_evk/doc/index.rst @@ -100,6 +100,9 @@ already supported, which can also be re-used on this mimxrt595_evk board: +-----------+------------+-------------------------------------+ | RTC | on-chip | counter | +-----------+------------+-------------------------------------+ +| PM | on-chip | power management; uses SoC sleep, | +| | | deep sleep and deep-powerdown modes | ++-----------+------------+-------------------------------------+ The default configuration can be found in the defconfig file: diff --git a/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33-pinctrl.dtsi b/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33-pinctrl.dtsi index 900af7ae0ec..7fb0a39595b 100644 --- a/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33-pinctrl.dtsi +++ b/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33-pinctrl.dtsi @@ -98,4 +98,45 @@ bias-pull-down; }; }; + + pinmux_flexspi: pinmux_flexspi { + group0 { + pinmux = , + , + , + , + , + , + , + , + , + ; + input-enable; + slew-rate = "normal"; + drive-strength = "high"; + }; + }; + + pinmux_flexspi_sleep: pinmux_flexspi_sleep { + group0 { + pinmux = , + ; + slew-rate = "normal"; + drive-strength = "high"; + }; + group1 { + pinmux = , + , + , + , + , + , + , + ; + input-enable; + slew-rate = "normal"; + drive-strength = "high"; + bias-pull-up; + }; + }; }; diff --git a/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33.dts b/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33.dts index f3c44ca2400..8ab5532ad4e 100644 --- a/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33.dts +++ b/boards/arm/mimxrt595_evk/mimxrt595_evk_cm33.dts @@ -91,6 +91,41 @@ <20 0 &gpio4 22 0>, /* D14 */ <21 0 &gpio4 21 0>; /* D15 */ }; + + power-states { + /* This is the setting Sleep Mode */ + idle: idle { + compatible = "zephyr,power-state"; + power-state-name = "runtime-idle"; + min-residency-us = <0>; + exit-latency-us = <0>; + }; + /* This is the setting for Deep-sleep Mode */ + suspend: suspend { + compatible = "nxp,pdcfg-power", "zephyr,power-state"; + power-state-name = "suspend-to-idle"; + min-residency-us = <500>; + exit-latency-us = <120>; + /* + * These values are written to the PDSLEEPCFG registers to keep certain + * blocks such as LPOSC, SRAM's, FlexSPI0 SRAM powered on during deep + * sleep mode. + */ + deep-sleep-config = <0xC800>, + <0x80000004>, + <0xFFFFFFFF>, + <0>; + }; + /* + * Deep power-down mode is supported in this SoC through 'PM_STATE_SOFT_OFF' state. + * There is no entry for this in device tree, user can call pm_state_force to enter + * this state. + */ + }; +}; + +&cpu0 { + cpu-power-states = <&idle &suspend>; }; /* @@ -164,23 +199,35 @@ arduino_serial: &flexcomm12 { pca9420_sw1: BUCK1 { regulator-boot-on; + nxp,mode0-microvolt = <1100000>; + nxp,mode1-microvolt = <600000>; + nxp,mode2-microvolt = <0>; }; pca9420_sw2: BUCK2 { regulator-boot-on; + nxp,mode0-microvolt = <1800000>; + nxp,mode1-microvolt = <1800000>; + nxp,mode2-microvolt = <1800000>; + }; pca9420_ldo1: LDO1 { regulator-boot-on; + nxp,mode0-microvolt = <1800000>; + nxp,mode1-microvolt = <1800000>; + nxp,mode2-microvolt = <1800000>; }; pca9420_ldo2: LDO2 { regulator-boot-on; + nxp,mode0-microvolt = <3300000>; + nxp,mode1-microvolt = <3300000>; + nxp,mode2-microvolt = <3300000>; }; }; }; - &gpio0 { status = "okay"; }; @@ -272,6 +319,10 @@ zephyr_udc0: &usbhs { &flexspi { status = "okay"; + pinctrl-0 = <&pinmux_flexspi>; + pinctrl-1 = <&pinmux_flexspi_sleep>; + pinctrl-names = "default", "sleep"; + mx25um51345g: mx25um51345g@0 { compatible = "nxp,imx-flexspi-mx25um51345g"; /* MX25UM51245G is 64MB, 512MBit flash part */