michaelh/zephyr
1
0
Fork 0
Code Releases Activity

arm atmel sam3: Add constants and structures for watchdog registers

Browse source 
Define symbolic constants for watchdog timer registers.
Provides the necessary interface to configure or disable
the watchdog timer.

Change-Id: I80002a843361569fdd78b725fc3f68e65195d02e
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
This commit is contained in:
Dmitriy Korovkin 2016-08-10 14:27:09 -04:00 • committed by Anas Nashif
commit 8409242d6d
2 changed files with 15 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

8
arch/arm/soc/atmel_sam3/soc.h
View file

@ -211,6 +211,11 @@
#define TWI0_ADDR 0x4008C000
#define TWI1_ADDR 0x40090000
/* Watchdog timer (WDT) */
#define WDT_ADDR 0x400E1A50
#define WDT_DISABLE (1 << 15)
#ifndef _ASMLANGUAGE
#include <device.h>
@ -244,6 +249,9 @@
#define __TWI0 ((volatile struct __twi *)TWI0_ADDR)
#define __TWI1 ((volatile struct __twi *)TWI1_ADDR)
/* Watchdog timer (WDT) */
#define __WDT ((volatile struct __wdt *)WDT_ADDR)
#endif /* !_ASMLANGUAGE */
#endif /* _ATMEL_SAM3_SOC_H_ */

7
arch/arm/soc/atmel_sam3/soc_registers.h
View file

@ -235,4 +235,11 @@ struct __twi {
struct __pdc pdc; /* 0x100 - 0x124 PDC */
};
/* Watchdog timer (WDT) */
struct __wdt {
uint32_t cr; /* 0x00 Control Register */
uint32_t mr; /* 0x04 Mode Register */
uint32_t sr; /* 0x08 Status Register */
};
#endif /* _ATMEL_SAM3_SOC_REGS_H_ */