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riscv: _isr_wrapper: get rid of the ASSUME_EQUAL() macro

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This is really useful only for one case i.e. when testing against zero.
Do that test inline where it is needed and make the rest of the code
independent from the actual numerical value being tested to make code
maintenance easier if/when new cases are added.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
This commit is contained in:
Nicolas Pitre 2022-06-30 13:02:39 -04:00 • committed by Carles Cufí
commit 83de5b4532
1 changed files with 3 additions and 6 deletions
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9
arch/riscv/core/isr.S
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@ -69,8 +69,6 @@
la dst, _kernel + ___kernel_t_cpus_OFFSET la dst, _kernel + ___kernel_t_cpus_OFFSET
#endif #endif
#define ASSUME_EQUAL(x, y) .if x != y; .err; .endif
/* imports */ /* imports */
GDATA(_sw_isr_table) GDATA(_sw_isr_table)
GTEXT(__soc_is_irq) GTEXT(__soc_is_irq)
@ -272,13 +270,12 @@ is_kernel_syscall:
/* Determine what to do. Operation code is in t0. */ /* Determine what to do. Operation code is in t0. */
lr t0, __z_arch_esf_t_t0_OFFSET(sp) lr t0, __z_arch_esf_t_t0_OFFSET(sp)
ASSUME_EQUAL(RV_ECALL_RUNTIME_EXCEPT, 0) .if RV_ECALL_RUNTIME_EXCEPT != 0; .err; .endif
beqz t0, do_fault beqz t0, do_fault
#if defined(CONFIG_IRQ_OFFLOAD) #if defined(CONFIG_IRQ_OFFLOAD)
addi t0, t0, -1 li t1, RV_ECALL_IRQ_OFFLOAD
ASSUME_EQUAL(RV_ECALL_IRQ_OFFLOAD, 1) beq t0, t1, do_irq_offload
beqz t0, do_irq_offload
#endif #endif
/* default fault code is K_ERR_KERNEL_OOPS */ /* default fault code is K_ERR_KERNEL_OOPS */