dts: bindings: clean up redundant required false attributes
DTS property attributes are (by default) not required. Explicitly specifying `required: false` is redundant. Perhaps a warning to that effect would be useful. Signed-off-by: Chris Friedt <cfriedt@meta.com>
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356 changed files with 0 additions and 1092 deletions
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@ -12,11 +12,9 @@ properties:
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required: true
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"#address-cells":
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required: false
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const: 1
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"#size-cells":
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required: false
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const: 0
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child-binding:
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@ -105,7 +103,6 @@ child-binding:
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zephyr,vref-mv:
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type: int
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required: false
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description: |
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This property can be used to specify the voltage (in millivolts)
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of the reference selected for this channel, so that applications
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@ -126,14 +123,12 @@ child-binding:
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zephyr,input-positive:
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type: int
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required: false
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description: |
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Positive ADC input. Used only for drivers that select
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the ADC_CONFIGURABLE_INPUTS Kconfig option.
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zephyr,input-negative:
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type: int
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required: false
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description: |
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Negative ADC input. Used only for drivers that select
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the ADC_CONFIGURABLE_INPUTS Kconfig option.
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@ -142,13 +137,11 @@ child-binding:
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zephyr,resolution:
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type: int
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required: false
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description: |
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ADC resolution to be used for the channel.
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zephyr,oversampling:
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type: int
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required: false
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description: |
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Oversampling setting to be used for the channel.
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When specified, each sample is averaged from 2^N conversion results
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@ -22,11 +22,9 @@ properties:
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io-channel-map-mask:
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type: compound
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required: false
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io-channel-map-pass-thru:
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type: compound
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required: false
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"#io-channel-cells":
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type: int
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@ -37,7 +37,6 @@ properties:
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calib-offset:
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type: int
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required: false
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description: |
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bit position offset in NVM SW Calib for start of ADC0 BIASCOMP field.
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This property is expected to be set on SAM{D,E}5x family of SoCs.
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@ -30,7 +30,6 @@ properties:
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rcu-clock-source:
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type: int
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required: false
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description: |
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Some GD32 ADC have additional clock source, like IRC14M or IRC28M.
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This property used to select the clock and related prescaler, valid
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@ -26,7 +26,6 @@ properties:
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alternate-voltage-reference:
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type: boolean
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required: false
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description: use alternate voltage reference source
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sample-time:
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@ -13,7 +13,6 @@ properties:
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channel-mux-b:
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type: boolean
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required: false
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description: |
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Use alternate set (b instead of a) of ADC channels
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@ -22,7 +21,6 @@ properties:
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periodic-trigger:
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type: boolean
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required: false
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description: if periodic trigger enabled
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"#io-channel-cells":
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@ -30,12 +28,10 @@ properties:
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clk-source:
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type: int
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required: false
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description: use alternate clock reference source
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long-sample:
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type: int
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required: false
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enum:
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- 0
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- 1
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@ -46,17 +42,14 @@ properties:
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continuous-convert:
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type: boolean
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required: false
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description: If use continuous convert
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high-speed:
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type: boolean
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required: false
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description: If use high speed
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hw-trigger-src:
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type: int
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required: false
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description: hardware trigger source (See ADCxTRGSEL field in user manual for more details)
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io-channel-cells:
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@ -13,7 +13,6 @@ properties:
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vref-mv:
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type: int
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required: false
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default: 3300
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description: |
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Indicate the reference voltage of the ADC in mV.
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@ -29,7 +29,6 @@ properties:
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vref-mv:
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type: int
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required: false
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default: 3300
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description: Indicates the reference voltage of the ADC in mV (on the target board).
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@ -7,7 +7,6 @@ bus: lmp90xxx
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properties:
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drdyb-gpios:
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type: phandle-array
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required: false
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description: Data Ready Bar
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"#io-channel-cells":
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@ -5,5 +5,4 @@ include: ti,lmp90xxx-base.yaml
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properties:
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rtd-current:
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type: int
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required: false
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description: RTD current in microampere
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@ -23,7 +23,6 @@ properties:
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full-ohms:
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type: int
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required: false
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description: |
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Resistance of the full path through the voltage divider.
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@ -32,7 +31,6 @@ properties:
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power-gpios:
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type: phandle-array
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required: false
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description: |
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Control power to the voltage divider inputs.
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@ -15,7 +15,6 @@ properties:
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ref-internal-mv:
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type: int
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required: false
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default: 0
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description:
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Internal reference voltage in mV. If not provided or set to zero,
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@ -23,7 +22,6 @@ properties:
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ref-vdd-mv:
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type: int
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required: false
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default: 0
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description:
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VDD reference voltage in mV. If not provided or set to zero,
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@ -31,7 +29,6 @@ properties:
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ref-external0-mv:
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type: int
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required: false
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default: 0
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description:
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External 0 reference voltage in mV. If not provided or set to zero,
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@ -39,7 +36,6 @@ properties:
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ref-external1-mv:
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type: int
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required: false
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default: 0
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description:
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External 1 reference voltage in mV. If not provided or set to zero,
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@ -17,7 +17,6 @@ properties:
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clk-pin:
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type: int
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deprecated: true
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required: false
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description: |
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IMPORTANT: This option will only be used if the new pin control driver
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is not enabled.
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@ -37,7 +36,6 @@ properties:
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din-pin:
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type: int
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deprecated: true
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required: false
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description: |
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IMPORTANT: This option will only be used if the new pin control driver
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is not enabled.
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@ -47,7 +45,6 @@ properties:
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clock-source:
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type: string
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required: false
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default: "PCLK32M_HFXO"
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description: |
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Clock source to be used by the PDM peripheral. The following options
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@ -66,7 +63,6 @@ properties:
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queue-size:
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type: int
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required: false
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default: 4
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description: |
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Size of the queue of received audio data blocks to be used
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@ -13,26 +13,21 @@ properties:
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description: Resynchronization jump width (ISO 11898-1)
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prop-seg:
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type: int
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required: false
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description: Time quantums of propagation segment (ISO 11898-1)
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phase-seg1:
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type: int
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required: false
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description: Time quantums of phase buffer 1 segment (ISO 11898-1)
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phase-seg2:
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type: int
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required: false
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description: Time quantums of phase buffer 2 segment (ISO 11898-1)
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sample-point:
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type: int
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required: false
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description: >
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Sample point in permille.
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This param is required if segments are not given.
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If the sample point is given, the segments are ignored.
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phys:
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type: phandle
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required: false
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description: |
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Actively controlled CAN transceiver.
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@ -13,24 +13,19 @@ properties:
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description: Resynchronization jump width for the data phase. (ISO11898-1:2015)
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prop-seg-data:
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type: int
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required: false
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description: Time quantums of propagation segment for the data phase. (ISO11898-1:2015)
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phase-seg1-data:
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type: int
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required: false
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description: Time quantums of phase buffer 1 segment for the data phase. (ISO11898-1:2015)
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phase-seg2-data:
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type: int
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required: false
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description: Time quantums of phase buffer 2 segment for the data phase. (ISO11898-1:2015)
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sample-point-data:
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type: int
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required: false
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description: >
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Sample point in permille for the data phase.
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This param is required if segments are not given.
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If the sample point is given, the segments are ignored.
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tx-delay-comp-offset:
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type: int
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required: false
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default: 0
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@ -25,7 +25,6 @@ properties:
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clkout-divider:
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type: int
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required: false
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description: |
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Clock divider for the CLKOUT signal. If not set, the CLKOUT signal is turned off.
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@ -22,5 +22,4 @@ properties:
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master-can-reg:
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type: int
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required: false
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description: master can reg when different from current instance
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@ -16,7 +16,6 @@ properties:
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clk-divider:
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type: int
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required: false
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enum:
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- 1
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- 2
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@ -18,7 +18,6 @@ properties:
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xtal-div:
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type: int
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required: false
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description: Divisor value for XTAL Clock, CPU_CLK = XTAL_FREQ / xtal-div
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"#clock-cells":
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@ -15,7 +15,6 @@ properties:
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clocks:
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type: array
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required: false
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description: input clock source
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"#clock-cells":
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@ -8,17 +8,14 @@ compatible: "intel,adsp-shim-clkctl"
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properties:
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adsp-clkctl-clk-wovcro:
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type: int
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required: false
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description: Index of WOVCRO clock encoding in the encoding array (if wovcro-supported is true).
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adsp-clkctl-clk-lpro:
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type: int
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required: false
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description: Index of LPRO clock encoding in the encoding array.
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adsp-clkctl-clk-hpro:
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type: int
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required: false
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description: Index of HPRO clock encoding in the encoding array.
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adsp-clkctl-freq-enc:
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@ -28,7 +25,6 @@ properties:
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adsp-clkctl-freq-mask:
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type: array
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required: false
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description: Array that encodes needed masks to enable each clock.
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adsp-clkctl-freq-default:
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@ -21,7 +21,6 @@ properties:
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slow-clock-div:
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type: int
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required: false
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description: |
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PWM and TACH clock domain divided down from 48 MHz AHB clock. The
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default value is 480 for 100 kHz.
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@ -38,7 +37,6 @@ properties:
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xtal-single-ended:
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type: boolean
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required: false
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description: Use single ended crystal connection to XTAL2 pin.
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"#clock-cells":
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@ -16,7 +16,6 @@ properties:
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hfclkaudio-frequency:
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type: int
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required: false
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description: |
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Frequency of the HFCLKAUDIO clock in Hz. Adjustable with 3.3 ppm
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resolution in two frequency bands - 11.176 MHz to 11.402 MHz, and
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@ -177,7 +177,6 @@ properties:
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apb4-prescaler:
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type: int
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required: false
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description: |
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APB4 prescaler. It sets the APB4 bus frequency, APB4_CLK, by dividing
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OFMCLK(MCLK) and needs to meet the following requirements.
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@ -207,7 +206,6 @@ properties:
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- 10
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ram-pd-depth:
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required: false
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type: int
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enum:
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- 12
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@ -13,10 +13,8 @@ properties:
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clkout-source:
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type: int
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required: false
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description: clkout clock source
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clkout-divider:
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type: int
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required: false
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description: clkout divider
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@ -14,7 +14,6 @@ properties:
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sosc-mode:
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type: int
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description: system oscillator mode
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required: false
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"#clock-cells":
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const: 1
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@ -23,17 +23,14 @@ properties:
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clkout-source:
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type: int
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required: false
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description: clkout clock source
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clkout-divider:
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type: int
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required: false
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description: clkout divider
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"#clock-cells":
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type: int
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required: false
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const: 3
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clock-cells:
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@ -10,7 +10,6 @@ include: [fixed-clock.yaml]
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properties:
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hse-bypass:
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type: boolean
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required: false
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description: |
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HSE crystal oscillator bypass
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Set to the property to by-pass the oscillator with an external clock.
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@ -23,7 +23,6 @@ properties:
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lse-bypass:
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type: boolean
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required: false
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description: |
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LSE crystal oscillator bypass
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Set the property to by-pass the oscillator with an external clock.
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@ -30,7 +30,6 @@ properties:
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msi-pll-mode:
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type: boolean
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required: false
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description: |
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MSI clock PLL enable
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Enables the PLL part of the MSI clock source.
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@ -124,7 +124,6 @@ properties:
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undershoot-prevention:
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type: boolean
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required: false
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description: |
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On some parts, it could be required to set up highest core frequencies
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(>80MHz) in two steps in order to prevent undershoot.
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@ -36,12 +36,10 @@ properties:
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xtpre:
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type: boolean
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required: false
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description: |
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Otpional HSE divider for PLL entry
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usbpre:
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type: int
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required: false
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description: |
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Otpional HSE divider for PLL entry
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@ -55,7 +55,6 @@ properties:
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div-q:
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type: int
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required: false
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description: |
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PLL division factor for PLL48CK
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Valid range: 2 - 15
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@ -57,7 +57,6 @@ properties:
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div-q:
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type: int
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required: false
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description: |
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Main PLL (PLL) division factor for USB OTG FS, SDMMC and random number
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generator clocks.
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@ -53,7 +53,6 @@ properties:
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div-q:
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type: int
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required: false
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description: |
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PLL division factor for PLL48CK
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Valid range: 2 - 15
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@ -46,14 +46,12 @@ properties:
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div-p:
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type: int
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required: false
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description: |
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PLL division factor for PLL P output
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Valid range: 2 - 32
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div-q:
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type: int
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required: false
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description: |
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PLL division factor for PLL Q output
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Valid range: 2 - 8
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@ -46,7 +46,6 @@ properties:
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div-p:
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type: int
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required: false
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description: |
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Main PLL division factor for ADC
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Valid range: 2 - 31
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@ -50,21 +50,18 @@ properties:
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div-p:
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type: int
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required: false
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description: |
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PLL division factor for pllx_p_ck
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Valid range: 1 - 128
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div-q:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
PLL division factor for pllx_q_ck
|
||||
Valid range: 1 - 128
|
||||
|
||||
div-r:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
PLL division factor for pllx_r_ck
|
||||
Valid range: 1 - 128
|
||||
|
|
|
@ -50,7 +50,6 @@ properties:
|
|||
|
||||
div-p:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
Main PLL division factor for PLLSAI3CLK
|
||||
enum:
|
||||
|
@ -59,7 +58,6 @@ properties:
|
|||
|
||||
div-q:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
Main PLL division factor for PLL48M1CLK (48 MHz clock).
|
||||
enum:
|
||||
|
|
|
@ -53,14 +53,12 @@ properties:
|
|||
|
||||
div-p:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
PLLx DIVP division factor
|
||||
Valid range: 1 - 128
|
||||
|
||||
div-q:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
PLLx DIVQ division factor
|
||||
Valid range: 1 - 128
|
||||
|
|
|
@ -51,14 +51,12 @@ properties:
|
|||
|
||||
div-p:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
Main PLL division factor for PLLPCLK
|
||||
Valid range: 2 - 32
|
||||
|
||||
div-q:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
Main PLL division factor for PLLQCLK
|
||||
Valid range: 2 - 8
|
||||
|
|
|
@ -10,14 +10,12 @@ include: [fixed-clock.yaml]
|
|||
properties:
|
||||
hse-tcxo:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
When set, TCXO is selected as external source clock for HSE.
|
||||
Otherwise, external cyrstal is selected as HSE source clock.
|
||||
|
||||
hse-div2:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
When set HSE output clock is divided by 2.
|
||||
Otherwise, no prescaler is used.
|
||||
|
|
|
@ -16,7 +16,6 @@ include:
|
|||
properties:
|
||||
cpu2-prescaler:
|
||||
type: int
|
||||
required: false
|
||||
enum:
|
||||
- 1
|
||||
- 2
|
||||
|
|
|
@ -10,7 +10,6 @@ description: Pseudo-device to help capturing desired data into core dumps
|
|||
properties:
|
||||
memory-regions:
|
||||
type: array
|
||||
required: false
|
||||
description: Start address and size of memory regions to be collected in a core dump
|
||||
|
||||
coredump-type:
|
||||
|
|
|
@ -52,6 +52,5 @@ properties:
|
|||
forced to 2.
|
||||
type: int
|
||||
default: 2
|
||||
required: false
|
||||
|
||||
compatible: "espressif,esp32-timer"
|
||||
|
|
|
@ -58,7 +58,6 @@ properties:
|
|||
|
||||
secondary_source:
|
||||
type: string
|
||||
required: false
|
||||
description: Secondary source of the timer, see qtmr_input_source_t enumerator type
|
||||
of the MCUXpresso SDK
|
||||
enum:
|
||||
|
@ -69,15 +68,12 @@ properties:
|
|||
|
||||
filter_count:
|
||||
type: int
|
||||
required: false
|
||||
description: Fault filter count (0-255).
|
||||
|
||||
filter_period:
|
||||
type: int
|
||||
required: false
|
||||
description: Fault filter period (0-255).
|
||||
|
||||
freq:
|
||||
type: int
|
||||
required: false
|
||||
description: clock frequency (only used for external clock sources)
|
||||
|
|
|
@ -11,4 +11,3 @@ properties:
|
|||
clock-source:
|
||||
type: int
|
||||
description: cpu clock source
|
||||
required: false
|
||||
|
|
|
@ -11,4 +11,3 @@ properties:
|
|||
clock-source:
|
||||
type: int
|
||||
description: cpu clock source
|
||||
required: false
|
||||
|
|
|
@ -8,17 +8,13 @@ include: base.yaml
|
|||
properties:
|
||||
clock-frequency:
|
||||
type: int
|
||||
required: false
|
||||
description: Clock frequency in Hz
|
||||
cpu-power-states:
|
||||
type: phandles
|
||||
required: false
|
||||
description: List of power management states supported by this cpu
|
||||
i-cache-line-size:
|
||||
type: int
|
||||
required: false
|
||||
description: i-cache line size
|
||||
d-cache-line-size:
|
||||
type: int
|
||||
required: false
|
||||
description: d-cache line size
|
||||
|
|
|
@ -11,4 +11,3 @@ properties:
|
|||
clock-source:
|
||||
type: int
|
||||
description: cpu clock source
|
||||
required: false
|
||||
|
|
|
@ -21,7 +21,6 @@ properties:
|
|||
|
||||
prescaler:
|
||||
type: int
|
||||
required: false
|
||||
default: 15
|
||||
description: |
|
||||
Peripheral Clock to DAC Clock Ratio. Prescaler value is calcuated as
|
||||
|
|
|
@ -21,7 +21,6 @@ properties:
|
|||
|
||||
reference:
|
||||
type: string
|
||||
required: false
|
||||
description: Reference voltage source
|
||||
enum:
|
||||
- "intref"
|
||||
|
|
|
@ -26,7 +26,6 @@ properties:
|
|||
type: int
|
||||
default: 0
|
||||
description: Reset value of DAC output. Defaults to 0, the SoC default.
|
||||
required: false
|
||||
|
||||
"#io-channel-cells":
|
||||
const: 1
|
||||
|
|
|
@ -31,7 +31,6 @@ properties:
|
|||
|
||||
gain:
|
||||
type: array
|
||||
required: false
|
||||
default: [0, 0, 0, 0]
|
||||
description: |
|
||||
Gain selection bit.
|
||||
|
|
|
@ -18,7 +18,6 @@ properties:
|
|||
|
||||
low-power-mode:
|
||||
type: boolean
|
||||
required: false
|
||||
description: Enable low-power mode
|
||||
|
||||
"#io-channel-cells":
|
||||
|
|
|
@ -18,12 +18,10 @@ properties:
|
|||
|
||||
low-power-mode:
|
||||
type: boolean
|
||||
required: false
|
||||
description: Enable low-power mode
|
||||
|
||||
buffered:
|
||||
type: boolean
|
||||
required: false
|
||||
description: Enable output buffer
|
||||
|
||||
"#io-channel-cells":
|
||||
|
|
|
@ -9,5 +9,4 @@ include: [base.yaml, pinctrl-device.yaml]
|
|||
properties:
|
||||
swo-ref-frequency:
|
||||
type: int
|
||||
required: false
|
||||
description: Reference clock frequency for SWO if different than CPU clock.
|
||||
|
|
|
@ -10,7 +10,6 @@ include: spi-device.yaml
|
|||
properties:
|
||||
irq-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description: Optional IRQ line of FT800 controller
|
||||
|
||||
pclk:
|
||||
|
|
|
@ -9,7 +9,6 @@ include: [spi-device.yaml, display-controller.yaml]
|
|||
properties:
|
||||
reset-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description: RESET pin.
|
||||
|
||||
The RESET pin of ILI9340 is active low.
|
||||
|
|
|
@ -11,7 +11,6 @@ include: spi-device.yaml
|
|||
properties:
|
||||
scan-limit:
|
||||
type: int
|
||||
required: false
|
||||
default: 7
|
||||
enum:
|
||||
- 0
|
||||
|
@ -28,7 +27,6 @@ properties:
|
|||
scan-limit is 1, and so on.
|
||||
intensity:
|
||||
type: int
|
||||
required: false
|
||||
default: 0
|
||||
enum:
|
||||
- 0
|
||||
|
@ -50,6 +48,5 @@ properties:
|
|||
description: Intensity for MAX7219.
|
||||
num-cascading:
|
||||
type: int
|
||||
required: false
|
||||
default: 1
|
||||
description: Number of cascading MAX7219.
|
||||
|
|
|
@ -58,7 +58,6 @@ properties:
|
|||
|
||||
pwm:
|
||||
type: phandle
|
||||
required: false
|
||||
description: |
|
||||
Reference to a PWM instance for generating pulse signals on column
|
||||
GPIOs. If not provided, GPIOTE and PPI channels are allocated and
|
||||
|
|
|
@ -13,14 +13,12 @@ include: [mipi-dsi-device.yaml, display-controller.yaml]
|
|||
properties:
|
||||
reset-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description: |
|
||||
The RESETn pin is asserted to disable the sensor causing a hard
|
||||
reset. The sensor receives this as an active-low signal.
|
||||
|
||||
bl-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description: |
|
||||
The BLn pin is asserted to control the backlight of the panel.
|
||||
The sensor receives this as an active-high signal.
|
||||
|
|
|
@ -10,7 +10,6 @@ include: [spi-device.yaml, display-controller.yaml]
|
|||
properties:
|
||||
extcomin-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description: EXTCOMIN pin
|
||||
|
||||
The EXTCOMIN pin is where a square pulse for toggling VCOM will
|
||||
|
@ -18,7 +17,6 @@ properties:
|
|||
|
||||
extcomin-frequency:
|
||||
type: int
|
||||
required: false
|
||||
description: EXTCOMIN pin toggle frequency
|
||||
|
||||
The frequency with which the EXTCOMIN pin should be toggled. See
|
||||
|
@ -27,7 +25,6 @@ properties:
|
|||
|
||||
disp-en-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description: DISPLAY pin
|
||||
|
||||
The DISPLAY pin controls if the LCD displays memory contents or
|
||||
|
|
|
@ -11,7 +11,6 @@ include: [spi-device.yaml, display-controller.yaml]
|
|||
properties:
|
||||
reset-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description: |
|
||||
RESET pin.
|
||||
|
||||
|
@ -21,7 +20,6 @@ properties:
|
|||
|
||||
cmd-data-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description: |
|
||||
D/CX pin. If configured, 4-lines serial interface is used, otherwise
|
||||
3-lines serial interface is used and a D/CX bit (9-bit) is added to
|
||||
|
@ -53,12 +51,10 @@ properties:
|
|||
|
||||
vrhs:
|
||||
type: int
|
||||
required: false
|
||||
description: VRH Setting
|
||||
|
||||
vdvs:
|
||||
type: int
|
||||
required: false
|
||||
description: VDV Setting
|
||||
|
||||
mdac:
|
||||
|
|
|
@ -26,17 +26,14 @@ properties:
|
|||
|
||||
segment-remap:
|
||||
type: boolean
|
||||
required: false
|
||||
description: Last column address is mapped to first segment
|
||||
|
||||
com-invdir:
|
||||
type: boolean
|
||||
required: false
|
||||
description: Scan direction is from last COM output to first COM output
|
||||
|
||||
com-sequential:
|
||||
type: boolean
|
||||
required: false
|
||||
description: Sequential COM pin configuration
|
||||
|
||||
prechargep:
|
||||
|
@ -46,7 +43,6 @@ properties:
|
|||
|
||||
reset-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description: RESET pin.
|
||||
|
||||
The RESET pin of SSD1306 is active low.
|
||||
|
|
|
@ -20,32 +20,26 @@ properties:
|
|||
|
||||
gdv:
|
||||
type: uint8-array
|
||||
required: false
|
||||
description: Gate driving voltage values
|
||||
|
||||
sdv:
|
||||
type: uint8-array
|
||||
required: false
|
||||
description: Source driving voltage values
|
||||
|
||||
vcom:
|
||||
type: int
|
||||
required: false
|
||||
description: VCOM voltage
|
||||
|
||||
border-waveform:
|
||||
type: int
|
||||
required: false
|
||||
description: Border waveform
|
||||
|
||||
softstart:
|
||||
type: uint8-array
|
||||
required: false
|
||||
description: Booster soft start values
|
||||
|
||||
orientation-flipped:
|
||||
type: boolean
|
||||
required: false
|
||||
description: Last column address is mapped to first segment
|
||||
|
||||
reset-gpios:
|
||||
|
@ -77,7 +71,6 @@ properties:
|
|||
|
||||
lut-initial:
|
||||
type: uint8-array
|
||||
required: false
|
||||
description: |
|
||||
Initial LUT used when initializing the device and performing
|
||||
clearing the screen using a full refresh operation. The
|
||||
|
@ -86,11 +79,9 @@ properties:
|
|||
|
||||
lut-default:
|
||||
type: uint8-array
|
||||
required: false
|
||||
|
||||
tssv:
|
||||
type: int
|
||||
required: false
|
||||
description: Temperature Sensor Selection Value
|
||||
|
||||
Display controller can have integrated temperature sensor or
|
||||
|
@ -99,10 +90,8 @@ properties:
|
|||
|
||||
dummy-line:
|
||||
type: int
|
||||
required: false
|
||||
description: Dummy line period override.
|
||||
|
||||
gate-line-width:
|
||||
type: int
|
||||
required: false
|
||||
description: Gate line width override.
|
||||
|
|
|
@ -10,21 +10,18 @@ include: [display-controller.yaml, pinctrl-device.yaml]
|
|||
properties:
|
||||
disp-on-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description: |
|
||||
Display on/off GPIO pin.
|
||||
Configure the GPIO polarity (active high/active low) according to LCD datasheet.
|
||||
|
||||
bl-ctrl-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description: |
|
||||
Backlight on/off GPIO pin.
|
||||
Configure the GPIO polarity (active high/active low) according to LCD datasheet.
|
||||
|
||||
ext-sdram:
|
||||
type: phandle
|
||||
required: false
|
||||
description: |
|
||||
External SDRAM in which frame buffer will be stored.
|
||||
If not defined, internal RAM will be used.
|
||||
|
@ -102,15 +99,12 @@ properties:
|
|||
|
||||
def-back-color-red:
|
||||
type: int
|
||||
required: false
|
||||
description: Default display background color - red
|
||||
|
||||
def-back-color-green:
|
||||
type: int
|
||||
required: false
|
||||
description: Default display background color - green
|
||||
|
||||
def-back-color-blue:
|
||||
type: int
|
||||
required: false
|
||||
description: Default display background color - blue
|
||||
|
|
|
@ -36,7 +36,6 @@ properties:
|
|||
|
||||
softstart:
|
||||
type: uint8-array
|
||||
required: false
|
||||
description: Booster Soft Start (BTST) values
|
||||
|
||||
child-binding:
|
||||
|
@ -63,57 +62,46 @@ child-binding:
|
|||
properties:
|
||||
pwr:
|
||||
type: uint8-array
|
||||
required: false
|
||||
description: Power Setting (PWR) values
|
||||
|
||||
cdi:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
VCOM and data interval value. This value is optional but must
|
||||
be provided to enable border refresh control.
|
||||
|
||||
tcon:
|
||||
type: int
|
||||
required: false
|
||||
description: TCON setting value
|
||||
|
||||
pll:
|
||||
type: int
|
||||
required: false
|
||||
description: PLL / frame rate control
|
||||
|
||||
vdcs:
|
||||
type: int
|
||||
required: false
|
||||
description: VCOM DC settings
|
||||
|
||||
lutc:
|
||||
type: uint8-array
|
||||
required: false
|
||||
description: VCOM LUT
|
||||
|
||||
lutww:
|
||||
type: uint8-array
|
||||
required: false
|
||||
description: White-to-white LUT
|
||||
|
||||
lutkw:
|
||||
type: uint8-array
|
||||
required: false
|
||||
description: Black-to-white LUT
|
||||
|
||||
lutwk:
|
||||
type: uint8-array
|
||||
required: false
|
||||
description: White-to-black LUT
|
||||
|
||||
lutkk:
|
||||
type: uint8-array
|
||||
required: false
|
||||
description: White-to-black LUT
|
||||
|
||||
lutbd:
|
||||
type: uint8-array
|
||||
required: false
|
||||
description: Border LUT
|
||||
|
|
|
@ -29,7 +29,6 @@ properties:
|
|||
interrupts:
|
||||
type: array
|
||||
description: Ring manager line interrupt number
|
||||
required: false
|
||||
pcie-ep:
|
||||
type: phandle
|
||||
description: Pcie endpoint handle
|
||||
|
|
|
@ -29,7 +29,6 @@ properties:
|
|||
interrupts:
|
||||
type: array
|
||||
description: Ring manager line interrupt number
|
||||
required: false
|
||||
pcie-ep:
|
||||
type: phandle
|
||||
description: Pcie endpoint handle
|
||||
|
|
|
@ -15,7 +15,6 @@ properties:
|
|||
|
||||
dma-channel-mask:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
Bitmask of available DMA channels in ascending order that are
|
||||
not reserved by firmware and are available to the
|
||||
|
@ -23,15 +22,12 @@ properties:
|
|||
|
||||
dma-channels:
|
||||
type: int
|
||||
required: false
|
||||
description: Number of DMA channels supported by the controller
|
||||
|
||||
dma-requests:
|
||||
type: int
|
||||
required: false
|
||||
description: Number of DMA request signals supported by the controller.
|
||||
|
||||
dma-buf-alignment:
|
||||
type: int
|
||||
required: false
|
||||
description: Memory alignment requirement for DMA buffers used by the controller.
|
||||
|
|
|
@ -20,7 +20,6 @@ properties:
|
|||
|
||||
dma-generators:
|
||||
type: int
|
||||
required: false
|
||||
description: Number of DMAMUX Request generator supported by the controller
|
||||
|
||||
dma-requests:
|
||||
|
|
|
@ -24,12 +24,10 @@ properties:
|
|||
|
||||
st,mem2mem:
|
||||
type: boolean
|
||||
required: false
|
||||
description: If the DMA controller V1 supports memory to memory transfer
|
||||
|
||||
dma-offset:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
offset in the table of channels when mapping to a DMAMUX
|
||||
for 1st dma instance, offset is 0,
|
||||
|
|
|
@ -10,7 +10,6 @@ include: [microchip_dsa.yaml]
|
|||
properties:
|
||||
workaround:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
Define the applied workaround for the switch used for
|
||||
short connections. Use bitmask to select the workaround or more
|
||||
|
@ -19,7 +18,6 @@ properties:
|
|||
0x04: 2) CAT-5E/6 Short Cable with a Link Issue for the KSZ8795 Family
|
||||
mii-lowspeed-drivestrength:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
Define the Low-Speed Interface Drive Strength for MII and RMMI
|
||||
Supported values 2,4,8,12,16,20,24,28mA
|
||||
|
|
|
@ -8,27 +8,22 @@ include: [spi-device.yaml]
|
|||
properties:
|
||||
dsa-master-port:
|
||||
type: phandle
|
||||
required: false
|
||||
description: Phandle to master port.
|
||||
dsa-slave-ports:
|
||||
type: int
|
||||
required: false
|
||||
description: Number of slave ports on the switch
|
||||
spi-cpha:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Set to indicate phase starts with asserted half-phase (CPHA=1).
|
||||
For this driver using this property requires also using cpol.
|
||||
spi-cpol:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Set to indicate clock leading edge is falling (CPOL=1).
|
||||
For this driver using this property requires also using cpha.
|
||||
reset-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description: |
|
||||
The pin is asserted for 10ms during boot to reset the KSZ8794.
|
||||
|
||||
|
@ -37,6 +32,5 @@ child-binding:
|
|||
properties:
|
||||
local-mac-address:
|
||||
type: uint8-array
|
||||
required: false
|
||||
description: |
|
||||
Specifies the MAC address that was assigned to the port
|
||||
|
|
|
@ -6,7 +6,3 @@ description: EDAC In-Band Error Correcting Code (IBECC)
|
|||
compatible: "intel,ibecc"
|
||||
|
||||
include: base.yaml
|
||||
|
||||
properties:
|
||||
reg:
|
||||
required: false
|
||||
|
|
|
@ -13,12 +13,6 @@ properties:
|
|||
reg:
|
||||
required: true
|
||||
|
||||
interrupts:
|
||||
required: false
|
||||
|
||||
interrupt-names:
|
||||
required: false
|
||||
|
||||
ldn:
|
||||
type: int
|
||||
required: true
|
||||
|
@ -26,18 +20,15 @@ properties:
|
|||
|
||||
girqs:
|
||||
type: array
|
||||
required: false
|
||||
description: array of GIRQ and bit positions
|
||||
|
||||
pcrs:
|
||||
type: array
|
||||
required: false
|
||||
description: PCR sleep register index and bit position
|
||||
|
||||
# optional properties application to different host facing devices
|
||||
host-io:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
Logical device Host I/O (x86) base. Refer to SoC documentation for the
|
||||
number of I/O decoders implemented by a device (1 or 2) and the fixed
|
||||
|
@ -45,7 +36,6 @@ properties:
|
|||
|
||||
host-io-addr-mask:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
Host I/O address mask. This value is fixed for all HW and is only
|
||||
used by Port80 BIOS debug alias device to specify the byte lane the
|
||||
|
@ -53,7 +43,6 @@ properties:
|
|||
|
||||
host-mem:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
Logical device Host memory (x86) base address. Refer to SoC
|
||||
documentation for which logical devices implement a memory decoder
|
||||
|
@ -61,7 +50,6 @@ properties:
|
|||
|
||||
emi-mems:
|
||||
type: array
|
||||
required: false
|
||||
description: |
|
||||
Each EMI host device supports Host access to two SoC data memory
|
||||
regions. Each region requires three configuration parameters:
|
||||
|
|
|
@ -26,27 +26,22 @@ properties:
|
|||
poll-timeout:
|
||||
type: int
|
||||
description: poll flash busy timeout in 32KHz periods
|
||||
required: false
|
||||
|
||||
poll-interval:
|
||||
type: int
|
||||
description: interval between flash busy poll in 20 ns units
|
||||
required: false
|
||||
|
||||
consec-rd-timeout:
|
||||
type: int
|
||||
description: timeout after last read to resume supended operations in 20 ns units
|
||||
required: false
|
||||
|
||||
sus-chk-delay:
|
||||
type: int
|
||||
description: hold off poll after suspend in 20 ns units
|
||||
required: false
|
||||
|
||||
sus-rsm-interval:
|
||||
type: int
|
||||
description: force suspended erase or program to resume in 32KHz periods
|
||||
required: false
|
||||
|
||||
"#girq-cells":
|
||||
type: int
|
||||
|
|
|
@ -16,29 +16,23 @@ properties:
|
|||
io_girq:
|
||||
type: int
|
||||
description: soc group irq index for eSPI I/O
|
||||
required: false
|
||||
|
||||
poll_timeout:
|
||||
type: int
|
||||
description: poll flash busy timeout in 32KHz periods
|
||||
required: false
|
||||
|
||||
poll_interval:
|
||||
type: int
|
||||
description: interval between flash busy poll in 20 ns units
|
||||
required: false
|
||||
|
||||
consec_rd_timeout:
|
||||
type: int
|
||||
description: timeout after last read to resume supended operations in 20 ns units
|
||||
required: false
|
||||
|
||||
sus_chk_delay:
|
||||
type: int
|
||||
description: hold off poll after suspend in 20 ns units
|
||||
required: false
|
||||
|
||||
sus_rsm_interval:
|
||||
type: int
|
||||
description: force suspended erase or program to resume in 32KHz periods
|
||||
required: false
|
||||
|
|
|
@ -17,7 +17,6 @@ child-binding:
|
|||
|
||||
vw-girq:
|
||||
type: array
|
||||
required: false
|
||||
description: |
|
||||
Routing of MSVW source to aggregated GIRQs
|
||||
|
||||
|
|
|
@ -14,5 +14,4 @@ child-binding:
|
|||
- 10
|
||||
full-duplex:
|
||||
type: boolean
|
||||
required: false
|
||||
description: The fixed link operates in full duplex mode
|
||||
|
|
|
@ -20,11 +20,9 @@ properties:
|
|||
description: MDIO driver node
|
||||
no-reset:
|
||||
type: boolean
|
||||
required: false
|
||||
description: Do not reset the PHY during initialization
|
||||
fixed-link:
|
||||
type: string
|
||||
required: false
|
||||
description: This link is fixed and does not require PHY configuration
|
||||
enum:
|
||||
- "10BASE-T Half-Duplex"
|
||||
|
|
|
@ -8,11 +8,9 @@ include: base.yaml
|
|||
properties:
|
||||
local-mac-address:
|
||||
type: uint8-array
|
||||
required: false
|
||||
description: Specifies the MAC address that was assigned to the network device
|
||||
zephyr,random-mac-address:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Use a random MAC address generated when the driver is initialized.
|
||||
Note that using this choice and rebooting a board may leave stale
|
||||
|
|
|
@ -18,10 +18,8 @@ properties:
|
|||
required: true
|
||||
reset-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description: GPIO to reset PHY. Reset signal is assumed active low.
|
||||
int-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description:
|
||||
interrupt GPIO for PHY. Will be pulled high before reset is asserted.
|
||||
|
|
|
@ -18,7 +18,6 @@ properties:
|
|||
as active low.
|
||||
reset-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description: Reset pin.
|
||||
|
||||
The reset pin of W5500 is active low.
|
||||
|
|
|
@ -41,7 +41,6 @@ properties:
|
|||
|
||||
init-mdio-phy:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Activates the management of a PHY associated with the controller in-
|
||||
stance. If this parameter is activated at the board level, the de-
|
||||
|
@ -83,7 +82,6 @@ properties:
|
|||
|
||||
advertise-lower-link-speeds:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Indicates to a driver instance which manages an associated PHY on
|
||||
the MDIO bus to include link speeds lower than the nominal value
|
||||
|
@ -92,7 +90,6 @@ properties:
|
|||
|
||||
handle-rx-in-isr:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Moves the handling of the frame received interrupt including the
|
||||
transfer of packet data from the DMA to network packet buffers and
|
||||
|
@ -104,7 +101,6 @@ properties:
|
|||
|
||||
handle-tx-in-workq:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Moves the handling of the frame transmission done interrupt into the
|
||||
context of the system work queue. By default, TX done handling is per-
|
||||
|
@ -153,7 +149,6 @@ properties:
|
|||
|
||||
hw-tx-buffer-size-full:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
When set, the hardware TX data buffer will make use of the full 4 kB
|
||||
that are available. If unset, the hardware TX data buffer will be
|
||||
|
@ -189,7 +184,6 @@ properties:
|
|||
|
||||
ignore-ipg-rxer:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Ignore IPG rx_er. When set, rx_er has no
|
||||
effect on the GEM's operation when rx_dv is low. Set this when using
|
||||
|
@ -197,14 +191,12 @@ properties:
|
|||
|
||||
disable-reject-nsp:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Receive bad preamble. When set, frames with
|
||||
non-standard preamble will not be rejected.
|
||||
|
||||
ipg-stretch:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Enable IPG stretch. When set, the transmit
|
||||
IPG can be increased above 96 bit times depending on the previous
|
||||
|
@ -212,7 +204,6 @@ properties:
|
|||
|
||||
sgmii-mode:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Enable SGMII mode. Changes the behaviour of
|
||||
the auto-negotiation advertisement and link partner ability registers
|
||||
|
@ -221,7 +212,6 @@ properties:
|
|||
|
||||
disable-reject-fcs-crc-errors:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Disable rejection of FCS/CRC errors.
|
||||
When set, frames with FCS/CRC errors will not be rejected. FCS error
|
||||
|
@ -231,14 +221,12 @@ properties:
|
|||
|
||||
rx-halfdup-while-tx:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Enable frames to be received in half-duplex
|
||||
mode while transmitting.
|
||||
|
||||
rx-checksum-offload:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Enable RX IP/TCP/UDP checksum offload to
|
||||
hardware. Frames with bad IP, TCP or UDP checksums will be discarded.
|
||||
|
@ -246,7 +234,6 @@ properties:
|
|||
|
||||
tx-checksum-offload:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Enable TX IP/TCP/UDP checksum offload to
|
||||
hardware. This option is NOT supported by the QEMU implementation
|
||||
|
@ -254,7 +241,6 @@ properties:
|
|||
|
||||
disable-pause-copy:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Do not copy received pause frames to memory.
|
||||
Set this option in order to prevent valid pause frames from being
|
||||
|
@ -267,7 +253,6 @@ properties:
|
|||
|
||||
discard-rx-fcs:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Remove FCS of received frames.
|
||||
When set, received frames will be written to memory without their
|
||||
|
@ -276,7 +261,6 @@ properties:
|
|||
|
||||
discard-rx-length-errors:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Discard frames with length field errors.
|
||||
When set, frames with a measured length shorter than the extracted
|
||||
|
@ -286,7 +270,6 @@ properties:
|
|||
|
||||
pause-frame:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Enable pause. When set, transmission will
|
||||
pause if a non zero 802.3 classic pause frame is received and PFC
|
||||
|
@ -294,28 +277,24 @@ properties:
|
|||
|
||||
tbi:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Enable TBI. When set, the TBI interface is en-
|
||||
bled instead of the GMII/MII interface.
|
||||
|
||||
ext-address-match:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Enable external address match. When set, the
|
||||
external address match interface can be used to copy frames to memory.
|
||||
|
||||
long-frame-rx-support:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Enable reception of 1536 byte frames.
|
||||
Normally, the GEM rejects any frame above 1518 bytes.
|
||||
|
||||
unicast-hash:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Enable unicast hash. When set, unicast frames
|
||||
will be accepted when the 6 bit hash function of the destination
|
||||
|
@ -323,7 +302,6 @@ properties:
|
|||
|
||||
multicast-hash:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Enable multicast hash. When set, mutlicast
|
||||
frames will be accepted when the 6 bit hash function of the desti-
|
||||
|
@ -331,47 +309,40 @@ properties:
|
|||
|
||||
reject-broadcast:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Reject broadcast frames. When set, frames
|
||||
addressed to the all-ones broadcast address will be rejected.
|
||||
|
||||
promiscuous-mode:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Enable promiscuous mode. When set, all valid
|
||||
frames will be accepted.
|
||||
|
||||
discard-non-vlan:
|
||||
type: boolean
|
||||
required: false
|
||||
description: Optional feature flag - Discard non-VLAN frames. When set,
|
||||
only VLAN tagged frames will be passed to the address matching logic.
|
||||
|
||||
full-duplex:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Enables full duplex reception and transmission.
|
||||
|
||||
discard-rx-frame-ahb-unavail:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Discard received packets when no AHB resource
|
||||
is available.
|
||||
|
||||
ahb-packet-endian-swap:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Enable AHB packet data endianness swap to big
|
||||
endian. If this flag is not set, data will be little endian.
|
||||
|
||||
ahb-md-endian-swap:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Optional feature flag - Enable AHB management descriptor data endian-
|
||||
ness swap to big endian. If this flag is not set, data will be little
|
||||
|
|
|
@ -40,7 +40,6 @@ properties:
|
|||
sck-pin:
|
||||
type: int
|
||||
deprecated: true
|
||||
required: false
|
||||
description: |
|
||||
IMPORTANT: This option will only be used if the new pin control driver
|
||||
is not enabled.
|
||||
|
@ -58,7 +57,6 @@ properties:
|
|||
sck-pin = <34>; /* 32 + 2 */
|
||||
io-pins:
|
||||
type: array
|
||||
required: false
|
||||
description: |
|
||||
IMPORTANT: This option will only be used if the new pin control driver
|
||||
is not enabled.
|
||||
|
@ -76,7 +74,6 @@ properties:
|
|||
sck-pin property's.
|
||||
csn-pins:
|
||||
type: array
|
||||
required: false
|
||||
description: |
|
||||
IMPORTANT: This option will only be used if the new pin control driver
|
||||
is not enabled.
|
||||
|
|
|
@ -34,7 +34,6 @@ properties:
|
|||
description: Flash Memory size in bits
|
||||
reset-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description: RESETn pin
|
||||
spi-bus-width:
|
||||
type: int
|
||||
|
@ -66,7 +65,6 @@ properties:
|
|||
- 2
|
||||
writeoc:
|
||||
type: string
|
||||
required: false
|
||||
enum:
|
||||
- "PP" # Page program, PP (0x02) up to 256 bytes
|
||||
- "PP_1_1_2" # Dual page program, PP 1-1-2 (0xA2)
|
||||
|
@ -90,7 +88,6 @@ properties:
|
|||
* OSPI_QUAD_MODE -> PP 1-4-4 (0x38)
|
||||
four-byte-opcodes:
|
||||
type: boolean
|
||||
required: false
|
||||
description: |
|
||||
Some NOR-Flash ICs use different opcodes when operating in
|
||||
4 byte addressing mode.
|
||||
|
|
|
@ -35,29 +35,23 @@ properties:
|
|||
description: Flash Memory size in bits
|
||||
reset-gpios:
|
||||
type: phandle-array
|
||||
required: false
|
||||
description: RESETn pin
|
||||
reset-gpios-duration:
|
||||
type: int
|
||||
required: false
|
||||
description: The duration (in ms) for the flash memory reset pulse
|
||||
reset-cmd:
|
||||
type: boolean
|
||||
required: false
|
||||
description: Send reset command on initialization
|
||||
reset-cmd-wait:
|
||||
type: int
|
||||
default: 10
|
||||
required: false
|
||||
description: The duration (in us) to wait after reset command
|
||||
spi-bus-width:
|
||||
type: int
|
||||
required: false
|
||||
description: The width of (Q)SPI bus to which flash memory is connected.
|
||||
Now only value of 4 (when using SIO[0123]) is supported.
|
||||
writeoc:
|
||||
type: string
|
||||
required: false
|
||||
enum:
|
||||
- "PP_1_1_4" # Quad data line SPI, PP 1-1-4 (0x32)
|
||||
- "PP_1_4_4" # Quad data line SPI, PP 1-4-4 (0x38)
|
||||
|
|
|
@ -8,9 +8,7 @@ properties:
|
|||
single-bank:
|
||||
type: boolean
|
||||
description: dual-bank mode not enabled (page erase 4096k)
|
||||
required: false
|
||||
|
||||
dual-bank:
|
||||
type: boolean
|
||||
description: dual-bank mode enabled (page erase 2048k)
|
||||
required: false
|
||||
|
|
|
@ -10,4 +10,3 @@ properties:
|
|||
erase-value:
|
||||
type: int
|
||||
description: Value of erased flash cell
|
||||
required: false
|
||||
|
|
|
@ -14,7 +14,6 @@ properties:
|
|||
description: Number of items to expect in a GPIO specifier
|
||||
ngpios:
|
||||
type: int
|
||||
required: false
|
||||
default: 32
|
||||
description: |
|
||||
This property indicates the number of in-use slots of available slots
|
||||
|
@ -28,7 +27,6 @@ properties:
|
|||
holes in the slot range, this value should be the max slot number-1.
|
||||
gpio-reserved-ranges:
|
||||
type: array
|
||||
required: false
|
||||
description: |
|
||||
If not all the GPIOs at offsets 0...N-1 are usable for ngpios = <N>, then
|
||||
this property contains an additional set of tuples which specify which GPIOs
|
||||
|
@ -39,7 +37,6 @@ properties:
|
|||
GPIO offsets 3, 4, and 10 are not usable, even if ngpios = <18>.
|
||||
gpio-line-names:
|
||||
type: string-array
|
||||
required: false
|
||||
description: |
|
||||
This is an array of strings defining the names of the GPIO lines
|
||||
going out of the GPIO controller
|
||||
|
|
|
@ -10,11 +10,9 @@ properties:
|
|||
|
||||
gpio-map-mask:
|
||||
type: compound
|
||||
required: false
|
||||
|
||||
gpio-map-pass-thru:
|
||||
type: compound
|
||||
required: false
|
||||
|
||||
"#gpio-cells":
|
||||
type: int
|
||||
|
|
|
@ -11,9 +11,6 @@ properties:
|
|||
reg:
|
||||
required: true
|
||||
|
||||
interrupts:
|
||||
required: false
|
||||
|
||||
"#gpio-cells":
|
||||
const: 2
|
||||
|
||||
|
|
|
@ -11,9 +11,6 @@ properties:
|
|||
reg:
|
||||
required: true
|
||||
|
||||
interrupts:
|
||||
required: false
|
||||
|
||||
port-id:
|
||||
type: int
|
||||
required: true
|
||||
|
|
|
@ -11,9 +11,6 @@ properties:
|
|||
reg:
|
||||
required: true
|
||||
|
||||
interrupts:
|
||||
required: false
|
||||
|
||||
port-id:
|
||||
type: int
|
||||
required: true
|
||||
|
|
|
@ -15,7 +15,6 @@ properties:
|
|||
const: 2
|
||||
|
||||
sense-edge-mask:
|
||||
required: false
|
||||
type: int
|
||||
description: |
|
||||
Mask of pins that use the GPIO sense mechanism for edge detection.
|
||||
|
|
|
@ -23,7 +23,6 @@ properties:
|
|||
|
||||
pinmux_mask:
|
||||
type: int
|
||||
required: false
|
||||
description: |
|
||||
NCT38XX series port 0 has Pin Multiplexing functionality. However, not
|
||||
every GPIOs have pinmux controller functionality. This property
|
||||
|
|
|
@ -30,7 +30,6 @@ properties:
|
|||
|
||||
lvol-maps:
|
||||
type: phandles
|
||||
required: false
|
||||
description: |
|
||||
Mapping table between Low-Voltage controllers and 8 IOs belong to
|
||||
this device. Please notice not all IOs support Low-Voltage detection.
|
||||
|
|
|
@ -11,17 +11,12 @@ properties:
|
|||
reg:
|
||||
required: true
|
||||
|
||||
interrupts:
|
||||
required: false
|
||||
|
||||
rdc:
|
||||
type: int
|
||||
required: false
|
||||
description: Set the RDC permission for this peripheral
|
||||
|
||||
pinmux:
|
||||
type: phandles
|
||||
required: false
|
||||
description: |
|
||||
IMX pin selection peripheral does not follow specific
|
||||
pattern for which GPIO port uses which pinmux. Use this property to specify
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Add table
Add a link
Reference in a new issue