drivers: display: stm32_ltdc: configure RIF for LTDC layer 1
Configure RIF for LTDC layer 1. Signed-off-by: Hugues Fruchet <hugues.fruchet@foss.st.com>
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2 changed files with 13 additions and 0 deletions
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@ -8,6 +8,7 @@ menuconfig STM32_LTDC
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default y
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depends on DT_HAS_ST_STM32_LTDC_ENABLED
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select USE_STM32_HAL_LTDC
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select USE_STM32_HAL_RIF if SOC_SERIES_STM32N6X
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select CACHE_MANAGEMENT if CPU_HAS_DCACHE
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select PINCTRL
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help
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@ -311,6 +311,9 @@ static int stm32_ltdc_init(const struct device *dev)
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int err;
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const struct display_stm32_ltdc_config *config = dev->config;
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struct display_stm32_ltdc_data *data = dev->data;
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#if defined(CONFIG_SOC_SERIES_STM32N6X)
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RIMC_MasterConfig_t rimc = {0};
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#endif
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/* Configure and set display on/off GPIO */
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if (config->disp_on_gpio.port) {
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@ -436,6 +439,15 @@ static int stm32_ltdc_init(const struct device *dev)
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return err;
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}
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#if defined(CONFIG_SOC_SERIES_STM32N6X)
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/* Configure RIF for LTDC layer 1 */
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rimc.MasterCID = RIF_CID_1;
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rimc.SecPriv = RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_PRIV;
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HAL_RIF_RIMC_ConfigMasterAttributes(RIF_MASTER_INDEX_LTDC1 , &rimc);
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HAL_RIF_RISC_SetSlaveSecureAttributes(RIF_RISC_PERIPH_INDEX_LTDCL1,
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RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_PRIV);
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#endif
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/* Disable layer 2, since it not used */
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__HAL_LTDC_LAYER_DISABLE(&data->hltdc, LTDC_LAYER_2);
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