drivers: display: stm32_ltdc: configure RIF for LTDC layer 1

Configure RIF for LTDC layer 1.

Signed-off-by: Hugues Fruchet <hugues.fruchet@foss.st.com>
This commit is contained in:
Hugues Fruchet 2025-04-02 15:11:27 +02:00 committed by Benjamin Cabé
commit 83b33d1e87
2 changed files with 13 additions and 0 deletions

View file

@ -8,6 +8,7 @@ menuconfig STM32_LTDC
default y
depends on DT_HAS_ST_STM32_LTDC_ENABLED
select USE_STM32_HAL_LTDC
select USE_STM32_HAL_RIF if SOC_SERIES_STM32N6X
select CACHE_MANAGEMENT if CPU_HAS_DCACHE
select PINCTRL
help

View file

@ -311,6 +311,9 @@ static int stm32_ltdc_init(const struct device *dev)
int err;
const struct display_stm32_ltdc_config *config = dev->config;
struct display_stm32_ltdc_data *data = dev->data;
#if defined(CONFIG_SOC_SERIES_STM32N6X)
RIMC_MasterConfig_t rimc = {0};
#endif
/* Configure and set display on/off GPIO */
if (config->disp_on_gpio.port) {
@ -436,6 +439,15 @@ static int stm32_ltdc_init(const struct device *dev)
return err;
}
#if defined(CONFIG_SOC_SERIES_STM32N6X)
/* Configure RIF for LTDC layer 1 */
rimc.MasterCID = RIF_CID_1;
rimc.SecPriv = RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_PRIV;
HAL_RIF_RIMC_ConfigMasterAttributes(RIF_MASTER_INDEX_LTDC1 , &rimc);
HAL_RIF_RISC_SetSlaveSecureAttributes(RIF_RISC_PERIPH_INDEX_LTDCL1,
RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_PRIV);
#endif
/* Disable layer 2, since it not used */
__HAL_LTDC_LAYER_DISABLE(&data->hltdc, LTDC_LAYER_2);