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arm: cmsis: Convert _ScbHardFaultIsForced to use direct CMSIS register access

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Jira: ZEP-1568

Change-Id: I9bf2ec4c84f87c8e9d72dc41324d7ee627d2dc2e
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2017-01-27 20:39:52 -06:00 • committed by Maureen Helm
commit 831764a898
2 changed files with 2 additions and 17 deletions
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4
arch/arm/core/fault.c
View file

@ -64,7 +64,7 @@ void _FaultDump(const NANO_ESF *esf, int fault)
int escalation = 0; int escalation = 0;
if (3 == fault) { /* hard fault */ if (3 == fault) { /* hard fault */
escalation = _ScbHardFaultIsForced(); escalation = SCB->HFSR & SCB_HFSR_FORCED_Msk;
PR_EXC("HARD FAULT: %s\n", PR_EXC("HARD FAULT: %s\n",
escalation ? "Escalation (see below)!" escalation ? "Escalation (see below)!"
: "Bus fault on vector table read\n"); : "Bus fault on vector table read\n");
@ -259,7 +259,7 @@ static void _HardFault(const NANO_ESF *esf)
#elif defined(CONFIG_ARMV7_M) #elif defined(CONFIG_ARMV7_M)
if (_ScbHardFaultIsBusErrOnVectorRead()) { if (_ScbHardFaultIsBusErrOnVectorRead()) {
PR_EXC(" Bus fault on vector table read\n"); PR_EXC(" Bus fault on vector table read\n");
} else if (_ScbHardFaultIsForced()) { } else if (SCB->HFSR & SCB_HFSR_FORCED_Msk) {
PR_EXC(" Fault escalation (see below)\n"); PR_EXC(" Fault escalation (see below)\n");
if (_ScbIsMemFault()) { if (_ScbIsMemFault()) {
_MpuFault(esf, 1); _MpuFault(esf, 1);

15
include/arch/arm/cortex_m/scb.h
View file

@ -76,21 +76,6 @@ static inline int _ScbHardFaultIsBusErrOnVectorRead(void)
return __scs.scb.hfsr.bit.vecttbl; return __scs.scb.hfsr.bit.vecttbl;
} }
/**
*
* @brief Find out if a fault was escalated to hard fault
*
* Happens if a fault cannot be triggered because of priority or because it was
* disabled.
*
* @return 1 if so, 0 otherwise
*/
static inline int _ScbHardFaultIsForced(void)
{
return __scs.scb.hfsr.bit.forced;
}
/** /**
* *
* @brief Clear all hard faults (HFSR register) * @brief Clear all hard faults (HFSR register)