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gpio: use consistent names for IRQ priority variables

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Change-Id: I35ca4a13bb9dc0fd86298fa4fb17158b275dc9cc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2016-05-07 08:10:52 -04:00 • committed by Anas Nashif
commit 82c969c8ae
8 changed files with 15 additions and 16 deletions
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4
arch/arc/soc/quark_se_ss/Kconfig.defconfig
View file

@ -78,7 +78,7 @@ config GPIO_DW_0
if GPIO_DW_0 if GPIO_DW_0
config GPIO_DW_0_PRI config GPIO_DW_0_IRQ_PRI
default 2 default 2
endif # GPIO_DW_0 endif # GPIO_DW_0
@ -88,7 +88,7 @@ config GPIO_DW_1
if GPIO_DW_1 if GPIO_DW_1
config GPIO_DW_1_PRI config GPIO_DW_1_IRQ_PRI
default 2 default 2
endif # GPIO_DW_1 endif # GPIO_DW_1

2
arch/x86/soc/quark_d2000/Kconfig.defconfig
View file

@ -110,7 +110,7 @@ config GPIO_QMSI
def_bool y def_bool y
config GPIO_QMSI_0 config GPIO_QMSI_0
def_bool y def_bool y
config GPIO_QMSI_0_PRI config GPIO_QMSI_0_IRQ_PRI
default 0 default 0
endif # GPIO endif # GPIO

4
arch/x86/soc/quark_se/Kconfig.defconfig
View file

@ -63,12 +63,12 @@ config GPIO_QMSI
config GPIO_QMSI_0 config GPIO_QMSI_0
def_bool y def_bool y
config GPIO_QMSI_0_PRI config GPIO_QMSI_0_IRQ_PRI
default 2 default 2
config GPIO_QMSI_AON config GPIO_QMSI_AON
def_bool y def_bool y
config GPIO_QMSI_AON_PRI config GPIO_QMSI_AON_IRQ_PRI
default 2 default 2
endif # GPIO endif # GPIO

2
arch/x86/soc/quark_x1000/Kconfig.defconfig
View file

@ -144,7 +144,7 @@ if GPIO_DW_0
config GPIO_DW_0_NAME config GPIO_DW_0_NAME
default "GPIO_0" default "GPIO_0"
config GPIO_DW_0_PRI config GPIO_DW_0_IRQ_PRI
default 2 default 2
config GPIO_DW_0_IRQ_SHARED_NAME config GPIO_DW_0_IRQ_SHARED_NAME
default SHARED_IRQ_0_NAME if SHARED_IRQ default SHARED_IRQ_0_NAME if SHARED_IRQ

4
drivers/gpio/Kconfig.dw
View file

@ -94,7 +94,7 @@ config GPIO_DW_0_IRQ_SHARED_NAME
this driver with the shared IRQ driver, so interrupts can be dispatched this driver with the shared IRQ driver, so interrupts can be dispatched
correctly. correctly.
config GPIO_DW_0_PRI config GPIO_DW_0_IRQ_PRI
int "Controller interrupt priority" int "Controller interrupt priority"
depends on GPIO_DW_0 && GPIO_DW_0_IRQ_DIRECT depends on GPIO_DW_0 && GPIO_DW_0_IRQ_DIRECT
help help
@ -144,7 +144,7 @@ config GPIO_DW_1_IRQ_SHARED_NAME
this driver with the shared IRQ driver, so interrupts can be dispatched this driver with the shared IRQ driver, so interrupts can be dispatched
correctly. correctly.
config GPIO_DW_1_PRI config GPIO_DW_1_IRQ_PRI
int "Controller interrupt priority" int "Controller interrupt priority"
depends on GPIO_DW_1 && GPIO_DW_1_IRQ_DIRECT depends on GPIO_DW_1 && GPIO_DW_1_IRQ_DIRECT
help help

4
drivers/gpio/Kconfig.qmsi
View file

@ -46,7 +46,7 @@ config GPIO_QMSI_0_NAME
depends on GPIO_QMSI_0 depends on GPIO_QMSI_0
default "GPIO_0" default "GPIO_0"
config GPIO_QMSI_0_PRI config GPIO_QMSI_0_IRQ_PRI
int "Controller interrupt priority" int "Controller interrupt priority"
depends on GPIO_QMSI_0 depends on GPIO_QMSI_0
help help
@ -64,7 +64,7 @@ config GPIO_QMSI_AON_NAME
depends on GPIO_QMSI_AON depends on GPIO_QMSI_AON
default "GPIO_AON_0" default "GPIO_AON_0"
config GPIO_QMSI_AON_PRI config GPIO_QMSI_AON_IRQ_PRI
int "Controller interrupt priority" int "Controller interrupt priority"
depends on GPIO_QMSI_AON depends on GPIO_QMSI_AON
help help

4
drivers/gpio/gpio_dw.c
View file

@ -471,7 +471,7 @@ void gpio_config_0_irq(struct device *port)
#ifdef CONFIG_GPIO_DW_0_IRQ_DIRECT #ifdef CONFIG_GPIO_DW_0_IRQ_DIRECT
ARG_UNUSED(shared_irq_dev); ARG_UNUSED(shared_irq_dev);
IRQ_CONNECT(GPIO_DW_0_IRQ, CONFIG_GPIO_DW_0_PRI, gpio_dw_isr, IRQ_CONNECT(GPIO_DW_0_IRQ, CONFIG_GPIO_DW_0_IRQ_PRI, gpio_dw_isr,
DEVICE_GET(gpio_dw_0), GPIO_DW_0_IRQ_FLAGS); DEVICE_GET(gpio_dw_0), GPIO_DW_0_IRQ_FLAGS);
irq_enable(config->irq_num); irq_enable(config->irq_num);
#elif defined(CONFIG_GPIO_DW_0_IRQ_SHARED) #elif defined(CONFIG_GPIO_DW_0_IRQ_SHARED)
@ -536,7 +536,7 @@ void gpio_config_1_irq(struct device *port)
#ifdef CONFIG_GPIO_DW_1_IRQ_DIRECT #ifdef CONFIG_GPIO_DW_1_IRQ_DIRECT
ARG_UNUSED(shared_irq_dev); ARG_UNUSED(shared_irq_dev);
IRQ_CONNECT(GPIO_DW_1_IRQ, CONFIG_GPIO_DW_1_PRI, gpio_dw_isr, IRQ_CONNECT(GPIO_DW_1_IRQ, CONFIG_GPIO_DW_1_IRQ_PRI, gpio_dw_isr,
DEVICE_GET(gpio_dw_1), GPIO_DW_1_IRQ_FLAGS); DEVICE_GET(gpio_dw_1), GPIO_DW_1_IRQ_FLAGS);
irq_enable(config->irq_num); irq_enable(config->irq_num);
#elif defined(CONFIG_GPIO_DW_1_IRQ_SHARED) #elif defined(CONFIG_GPIO_DW_1_IRQ_SHARED)

7
drivers/gpio/gpio_qmsi.c
View file

@ -282,16 +282,15 @@ int gpio_qmsi_init(struct device *port)
CLK_PERIPH_GPIO_INTERRUPT | CLK_PERIPH_GPIO_INTERRUPT |
CLK_PERIPH_GPIO_DB | CLK_PERIPH_GPIO_DB |
CLK_PERIPH_CLK); CLK_PERIPH_CLK);
IRQ_CONNECT(QM_IRQ_GPIO_0, IRQ_CONNECT(QM_IRQ_GPIO_0, CONFIG_GPIO_QMSI_0_IRQ_PRI,
CONFIG_GPIO_QMSI_0_PRI, qm_gpio_isr_0, qm_gpio_isr_0, 0, IOAPIC_LEVEL | IOAPIC_HIGH);
0, IOAPIC_LEVEL | IOAPIC_HIGH);
irq_enable(QM_IRQ_GPIO_0); irq_enable(QM_IRQ_GPIO_0);
QM_SCSS_INT->int_gpio_mask &= ~BIT(0); QM_SCSS_INT->int_gpio_mask &= ~BIT(0);
break; break;
#ifdef CONFIG_GPIO_QMSI_AON #ifdef CONFIG_GPIO_QMSI_AON
case QM_AON_GPIO_0: case QM_AON_GPIO_0:
IRQ_CONNECT(QM_IRQ_AONGPIO_0, IRQ_CONNECT(QM_IRQ_AONGPIO_0,
CONFIG_GPIO_QMSI_AON_PRI, qm_aon_gpio_isr_0, CONFIG_GPIO_QMSI_AON_IRQ_PRI, qm_aon_gpio_isr_0,
0, IOAPIC_LEVEL | IOAPIC_HIGH); 0, IOAPIC_LEVEL | IOAPIC_HIGH);
irq_enable(QM_IRQ_AONGPIO_0); irq_enable(QM_IRQ_AONGPIO_0);
QM_SCSS_INT->int_aon_gpio_mask &= ~BIT(0); QM_SCSS_INT->int_aon_gpio_mask &= ~BIT(0);