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gpio: use consistent names for IRQ priority variables

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Change-Id: I35ca4a13bb9dc0fd86298fa4fb17158b275dc9cc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2016-05-07 08:10:52 -04:00 • committed by Anas Nashif
commit 82c969c8ae
8 changed files with 15 additions and 16 deletions
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7
drivers/gpio/gpio_qmsi.c
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@ -282,16 +282,15 @@ int gpio_qmsi_init(struct device *port)
CLK_PERIPH_GPIO_INTERRUPT |
CLK_PERIPH_GPIO_DB |
CLK_PERIPH_CLK);
IRQ_CONNECT(QM_IRQ_GPIO_0,
CONFIG_GPIO_QMSI_0_PRI, qm_gpio_isr_0,
0, IOAPIC_LEVEL | IOAPIC_HIGH);
IRQ_CONNECT(QM_IRQ_GPIO_0, CONFIG_GPIO_QMSI_0_IRQ_PRI,
qm_gpio_isr_0, 0, IOAPIC_LEVEL | IOAPIC_HIGH);
irq_enable(QM_IRQ_GPIO_0);
QM_SCSS_INT->int_gpio_mask &= ~BIT(0);
break;
#ifdef CONFIG_GPIO_QMSI_AON
case QM_AON_GPIO_0:
IRQ_CONNECT(QM_IRQ_AONGPIO_0,
CONFIG_GPIO_QMSI_AON_PRI, qm_aon_gpio_isr_0,
CONFIG_GPIO_QMSI_AON_IRQ_PRI, qm_aon_gpio_isr_0,
0, IOAPIC_LEVEL | IOAPIC_HIGH);
irq_enable(QM_IRQ_AONGPIO_0);
QM_SCSS_INT->int_aon_gpio_mask &= ~BIT(0);