From 81d61601a810cea0741657656a943021199793e8 Mon Sep 17 00:00:00 2001 From: Ulf Magnusson Date: Fri, 22 Jun 2018 00:15:41 +0200 Subject: [PATCH] arch: riscv32: Kconfig: Remove redundant 'default n' properties Bool symbols implicitly default to 'n'. A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you want to override a 'default y' on the base definition of the symbol. It isn't used like that on any of these symbols though. Signed-off-by: Ulf Magnusson --- arch/riscv32/Kconfig | 4 ---- arch/riscv32/soc/riscv-privilege/Kconfig | 2 -- 2 files changed, 6 deletions(-) diff --git a/arch/riscv32/Kconfig b/arch/riscv32/Kconfig index d698b463050..303613f92c3 100644 --- a/arch/riscv32/Kconfig +++ b/arch/riscv32/Kconfig @@ -25,20 +25,17 @@ menu "RISCV32 Processor Options" config INCLUDE_RESET_VECTOR bool "Include Reset vector" - default n help Include the reset vector stub that inits CPU and then jumps to __start config RISCV_SOC_CONTEXT_SAVE bool "Enable SOC-based context saving in IRQ handler" - default n help Enable SOC-based context saving, for SOCS which require saving of extra registers when entering an interrupt/exception config RISCV_SOC_INTERRUPT_INIT bool "Enable SOC-based interrupt initialization" - default n help Enable SOC-based interrupt initialization (call soc_interrupt_init, within _IntLibInit when enabled) @@ -53,7 +50,6 @@ config RISCV_GENERIC_TOOLCHAIN config RISCV_HAS_CPU_IDLE bool "Does SOC has CPU IDLE instruction" - default n help Does SOC has CPU IDLE instruction diff --git a/arch/riscv32/soc/riscv-privilege/Kconfig b/arch/riscv32/soc/riscv-privilege/Kconfig index 9ba6d127adf..11e4eb3769e 100644 --- a/arch/riscv32/soc/riscv-privilege/Kconfig +++ b/arch/riscv32/soc/riscv-privilege/Kconfig @@ -9,7 +9,6 @@ config SOC_FAMILY_RISCV_PRIVILEGE bool # omit prompt to signify a "hidden" option - default n config SOC_FAMILY string @@ -18,7 +17,6 @@ config SOC_FAMILY config RISCV_HAS_PLIC bool "Does the SOC provide support for a Platform Level Interrupt Controller" - default n depends on SOC_FAMILY_RISCV_PRIVILEGE help Does the SOC provide support for a Platform Level Interrupt Controller