arch: xtensa: Add support for Intel Apollolake

Add the necessary architecture changes for Intel Apollolake.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>

arch/xtensa/core/CMakeLists.txt

@@ -10,6 +10,7 @@ zephyr_library_sources(
   window_vectors.S
   xtensa-asm2-util.S
   xtensa-asm2.c
+  irq_manage.c
   )
 
 zephyr_library_sources_ifndef(CONFIG_ATOMIC_OPERATIONS_C atomic.S)

arch/xtensa/core/irq_manage.c

@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2016 Cadence Design Systems, Inc.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/types.h>
+#include <stdio.h>
+#include <arch/xtensa/xtensa_api.h>
+#include <kernel_arch_data.h>
+#include <sys/__assert.h>
+/*
+ * @internal
+ *
+ * @brief Set an interrupt's priority
+ *
+ * The priority is verified if ASSERT_ON is enabled.
+ *
+ * The priority is verified if ASSERT_ON is enabled. The maximum number of
+ * priority levels is a little complex, as there are some hardware priority
+ * levels which are reserved: three for various types of exceptions, and
+ * possibly one additional to support zero latency interrupts.
+ *
+ * Valid values are from 1 to 6. Interrupts of priority 1 are not masked when
+ * interrupts are locked system-wide, so care must be taken when using them.
+ * ISR installed with priority 0 interrupts cannot make kernel calls.
+ *
+ * @return N/A
+ */
+
+void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags)
+{
+	__ASSERT(prio < XCHAL_EXCM_LEVEL + 1,
+		 "invalid priority %d! values must be less than %d\n",
+		 prio, XCHAL_EXCM_LEVEL + 1);
+	/* TODO: Write code to set priority if this is ever possible on
+	 * Xtensa
+	 */
+}
+
+#ifdef CONFIG_DYNAMIC_INTERRUPTS
+#ifndef CONFIG_MULTI_LEVEL_INTERRUPTS
+int z_arch_irq_connect_dynamic(unsigned int irq, unsigned int priority,
+			       void (*routine)(void *parameter),
+			       void *parameter, u32_t flags)
+{
+	ARG_UNUSED(flags);
+	ARG_UNUSED(priority);
+
+	z_isr_install(irq, routine, parameter);
+	return irq;
+}
+#else /* !CONFIG_MULTI_LEVEL_INTERRUPTS */
+int z_arch_irq_connect_dynamic(unsigned int irq, unsigned int priority,
+			       void (*routine)(void *parameter),
+			       void *parameter, u32_t flags)
+{
+	return z_soc_irq_connect_dynamic(irq, priority, routine, parameter,
+					 flags);
+}
+#endif /* !CONFIG_MULTI_LEVEL_INTERRUPTS */
+#endif /* CONFIG_DYNAMIC_INTERRUPTS */

include/arch/xtensa/arch.h

@@ -18,6 +18,7 @@
 #include <devicetree.h>
 #if !defined(_ASMLANGUAGE) && !defined(__ASSEMBLER__)
 #include <zephyr/types.h>
+#include <toolchain.h>
 #include <arch/common/sys_io.h>
 #include <arch/common/ffs.h>
 #include <sw_isr_table.h>

include/arch/xtensa/irq.h

@@ -36,6 +36,12 @@
 
 #define arch_irq_is_enabled(irq)	z_soc_irq_is_enabled(irq)
 
+#ifdef CONFIG_DYNAMIC_INTERRUPTS
+extern int z_soc_irq_connect_dynamic(unsigned int irq, unsigned int priority,
+				     void (*routine)(void *parameter),
+				     void *parameter, u32_t flags);
+#endif
+
 #else
 
 #define CONFIG_NUM_IRQS XCHAL_NUM_INTERRUPTS