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tests: drivers: clock_control: stm32 common: also test get_status

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Add clock_control_get_status checks to the stm32_common_devices adc
and i2c tests, to verify that checking the status of gating clocks and
domain clock sources works.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit is contained in:
Thomas Stranger 2023-04-13 10:24:41 +02:00 • committed by Carles Cufí
commit 8178807b31
2 changed files with 35 additions and 2 deletions
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18
tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/src/test_stm32_clock_configuration_adc.c
View file

@ -54,13 +54,24 @@ ZTEST(stm32_common_devices_clocks, test_adc_clk_config)
uint32_t dev_dt_clk_freq, dev_actual_clk_freq; uint32_t dev_dt_clk_freq, dev_actual_clk_freq;
uint32_t dev_actual_clk_src; uint32_t dev_actual_clk_src;
int r; int r;
enum clock_control_status status;
status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
(clock_control_subsys_t)&pclken[0]);
zassert_true((status == CLOCK_CONTROL_STATUS_OFF),
"ADC1 gating clock should be off initially");
/* Test clock_on(gating clock) */ /* Test clock_on(gating clock) */
r = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), r = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
(clock_control_subsys_t) &pclken[0]); (clock_control_subsys_t) &pclken[0]);
zassert_true((r == 0), "Could not enable ADC1 gating clock"); zassert_true((r == 0), "Could not enable ADC1 gating clock");
zassert_true(ADC_IS_CLK_ENABLED(), "ADC1 gating clock should be on"); /* Check via HAL as well as via get_status API */
zassert_true(ADC_IS_CLK_ENABLED(), "[HAL] ADC1 gating clock should be on");
status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
(clock_control_subsys_t)&pclken[0]);
zassert_true((status == CLOCK_CONTROL_STATUS_ON),
"[Zephyr] ADC1 gating clock should be on");
TC_PRINT("ADC1 gating clock on\n"); TC_PRINT("ADC1 gating clock on\n");
if (IS_ENABLED(STM32_ADC_DOMAIN_CLOCK_SUPPORT) && DT_NUM_CLOCKS(DT_NODELABEL(adc1)) > 1) { if (IS_ENABLED(STM32_ADC_DOMAIN_CLOCK_SUPPORT) && DT_NUM_CLOCKS(DT_NODELABEL(adc1)) > 1) {
@ -87,6 +98,11 @@ ZTEST(stm32_common_devices_clocks, test_adc_clk_config)
zassert_true(0, "Unexpected src clk (%d)", dev_actual_clk_src); zassert_true(0, "Unexpected src clk (%d)", dev_actual_clk_src);
} }
/* Test status of the used clk source */
status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
(clock_control_subsys_t)&pclken[1]);
zassert_true((status == CLOCK_CONTROL_STATUS_ON), "ADC1 clk src must to be on");
/* Test get_rate(srce clk) */ /* Test get_rate(srce clk) */
r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
(clock_control_subsys_t) &pclken[1], (clock_control_subsys_t) &pclken[1],

19
tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/src/test_stm32_clock_configuration_i2c.c
View file

@ -28,6 +28,7 @@
static void i2c_set_clock(const struct stm32_pclken *clk) static void i2c_set_clock(const struct stm32_pclken *clk)
{ {
uint32_t dev_dt_clk_freq, dev_actual_clk_freq; uint32_t dev_dt_clk_freq, dev_actual_clk_freq;
enum clock_control_status status;
/* Test clock_on(domain_clk) */ /* Test clock_on(domain_clk) */
int r = clock_control_configure(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), int r = clock_control_configure(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
@ -51,6 +52,11 @@ static void i2c_set_clock(const struct stm32_pclken *clk)
zassert_true(0, "Unexpected domain clk (0x%x)", dev_actual_clk_src); zassert_true(0, "Unexpected domain clk (0x%x)", dev_actual_clk_src);
} }
/* Test status of the used clk source */
status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
(clock_control_subsys_t)clk);
zassert_true((status == CLOCK_CONTROL_STATUS_ON), "I2C1 clk src must to be on");
/* Test get_rate(srce clk) */ /* Test get_rate(srce clk) */
r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
(clock_control_subsys_t) clk, (clock_control_subsys_t) clk,
@ -71,13 +77,24 @@ ZTEST(stm32_common_devices_clocks, test_i2c_clk_config)
uint32_t dev_dt_clk_freq, dev_actual_clk_freq; uint32_t dev_dt_clk_freq, dev_actual_clk_freq;
int r; int r;
enum clock_control_status status;
status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
(clock_control_subsys_t)&pclken[0]);
zassert_true((status == CLOCK_CONTROL_STATUS_OFF),
"I2C Gating clock should be off initially");
/* Test clock_on(gating clock) */ /* Test clock_on(gating clock) */
r = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), r = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
(clock_control_subsys_t) &pclken[0]); (clock_control_subsys_t) &pclken[0]);
zassert_true((r == 0), "Could not enable I2C gating clock"); zassert_true((r == 0), "Could not enable I2C gating clock");
zassert_true(__HAL_RCC_I2C1_IS_CLK_ENABLED(), "I2C1 gating clock should be on"); /* Check via HAL as well as via get_status API */
zassert_true(__HAL_RCC_I2C1_IS_CLK_ENABLED(), "[HAL] I2C1 gating clock should be on");
status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
(clock_control_subsys_t)&pclken[0]);
zassert_true((status == CLOCK_CONTROL_STATUS_ON),
"[Zephyr] I2C1 gating clock should be on");
TC_PRINT("I2C1 gating clock on\n"); TC_PRINT("I2C1 gating clock on\n");
if (IS_ENABLED(STM32_I2C_DOMAIN_CLOCK_SUPPORT) && DT_NUM_CLOCKS(DT_NODELABEL(i2c1)) > 1) { if (IS_ENABLED(STM32_I2C_DOMAIN_CLOCK_SUPPORT) && DT_NUM_CLOCKS(DT_NODELABEL(i2c1)) > 1) {