diff --git a/arch/arc/core/arc_smp.c b/arch/arc/core/arc_smp.c
index e3b3c8a2d5d..57a49ea96ae 100644
--- a/arch/arc/core/arc_smp.c
+++ b/arch/arc/core/arc_smp.c
@@ -72,7 +72,6 @@ void z_arc_slave_start(int cpu_num)
 	arch_cpustart_t fn;
 
 #ifdef CONFIG_SMP
-	z_icache_setup();
 	z_irq_setup();
 
 	z_arc_connect_ici_clear();
diff --git a/arch/arc/core/prep_c.c b/arch/arc/core/prep_c.c
index ebe4a1d323d..569643e835c 100644
--- a/arch/arc/core/prep_c.c
+++ b/arch/arc/core/prep_c.c
@@ -85,7 +85,6 @@ extern FUNC_NORETURN void z_cstart(void);
 
 void _PrepC(void)
 {
-	z_icache_setup();
 	z_bss_zero();
 	z_data_copy();
 	z_cstart();
diff --git a/arch/arc/core/reset.S b/arch/arc/core/reset.S
index 732262690e8..793598a3aae 100644
--- a/arch/arc/core/reset.S
+++ b/arch/arc/core/reset.S
@@ -95,13 +95,10 @@ SECTION_FUNC(TEXT,__start)
 	kflag r0
 #endif
 
-	mov_s r1, 1
-
-invalidate_and_disable_icache:
-
+/* Invalidate icache */
 	lr r0, [_ARC_V2_I_CACHE_BUILD]
 	and.f r0, r0, 0xff
-	bz.nd invalidate_dcache
+	bz.nd done_icache_invalidate
 
 	mov_s r2, 0
 	sr r2, [_ARC_V2_IC_IVIC]
@@ -109,17 +106,17 @@ invalidate_and_disable_icache:
 	nop_s
 	nop_s
 	nop_s
-	sr r1, [_ARC_V2_IC_CTRL]
-
-invalidate_dcache:
+done_icache_invalidate:
 
+/* Invalidate dcache */
 	lr r3, [_ARC_V2_D_CACHE_BUILD]
 	and.f r3, r3, 0xff
-	bz.nd done_cache_invalidate
+	bz.nd done_dcache_invalidate
 
+	mov_s r1, 1
 	sr r1, [_ARC_V2_DC_IVDC]
 
-done_cache_invalidate:
+done_dcache_invalidate:
 
 /*
  * Init ARC internal architecture state
diff --git a/arch/arc/include/kernel_arch_func.h b/arch/arc/include/kernel_arch_func.h
index 2b2e6006190..d6929cc9794 100644
--- a/arch/arc/include/kernel_arch_func.h
+++ b/arch/arc/include/kernel_arch_func.h
@@ -25,7 +25,6 @@
 #include <kernel_arch_data.h>
 
 #ifdef CONFIG_CPU_ARCV2
-#include <v2/cache.h>
 #include <v2/irq.h>
 #endif
 
diff --git a/arch/arc/include/v2/cache.h b/arch/arc/include/v2/cache.h
deleted file mode 100644
index 43414225297..00000000000
--- a/arch/arc/include/v2/cache.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * Copyright (c) 2014 Wind River Systems, Inc.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/**
- * @file
- * @brief Cache helper functions and defines (ARC)
- *
- * This file contains cache related functions and definitions for the
- * ARCv2 processor architecture.
- */
-
-#ifndef ZEPHYR_ARCH_ARC_INCLUDE_V2_CACHE_H_
-#define ZEPHYR_ARCH_ARC_INCLUDE_V2_CACHE_H_
-
-#include <arch/cpu.h>
-
-#ifndef _ASMLANGUAGE
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* i-cache defines for IC_CTRL register */
-#define IC_CACHE_ENABLE   0x00
-#define IC_CACHE_DISABLE  0x01
-#define IC_CACHE_DIRECT   0x00
-#define IC_CACHE_INDIRECT 0x20
-
-/*
- * @brief Initialize the I-cache
- *
- * Enables the i-cache and sets it to direct access mode.
- */
-static ALWAYS_INLINE void z_icache_setup(void)
-{
-	uint32_t icache_config = (
-		IC_CACHE_DIRECT | /* direct mapping (one-way assoc.) */
-		IC_CACHE_ENABLE   /* i-cache enabled */
-	);
-	uint32_t val;
-
-	val = z_arc_v2_aux_reg_read(_ARC_V2_I_CACHE_BUILD);
-	val &= 0xff;
-	if (val != 0U) { /* is i-cache present? */
-		/* configure i-cache */
-		z_arc_v2_aux_reg_write(_ARC_V2_IC_CTRL, icache_config);
-	}
-}
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _ASMLANGUAGE */
-
-#endif /* ZEPHYR_ARCH_ARC_INCLUDE_V2_CACHE_H_ */