diff --git a/boards/arm/mimxrt1062_fmurt6/CMakeLists.txt b/boards/arm/mimxrt1062_fmurt6/CMakeLists.txt new file mode 100644 index 00000000000..7132083c109 --- /dev/null +++ b/boards/arm/mimxrt1062_fmurt6/CMakeLists.txt @@ -0,0 +1,46 @@ +# +# SPDX-License-Identifier: Apache-2.0 +# +# Copyright 2023 NXP +# + +if (CONFIG_DISPLAY) +message(WARNING " +CONFIG_DISPLAY: Running this firmware on a board without a display may damage the board +") +endif() + +if(CONFIG_NXP_IMX_RT_BOOT_HEADER) + zephyr_library() + if(CONFIG_BOARD_MIMXRT1062_FMURT6) + # No flash configuration block exists for the RT1060 with HyperFlash in + # the SDK, but we can reuse the block for the RT1050 as FMURT6 also uses + # the same HyperFlash chip + set(FLASH_CONF evkbimxrt1050_flexspi_nor_config.c) + set(BOARD_NAME evkbimxrt1050) + endif() + set(RT1062_BOARD_DIR + "${ZEPHYR_HAL_NXP_MODULE_DIR}/mcux/mcux-sdk/boards/${BOARD_NAME}") + if(CONFIG_BOOT_FLEXSPI_NOR) + # Include flash configuration block for RT1050 EVK from NXP's HAL. + # This configuration block may need modification if another flash chip is + # used on your custom board. See NXP AN12238 for more information. + zephyr_compile_definitions(XIP_BOOT_HEADER_ENABLE=1) + zephyr_compile_definitions(BOARD_FLASH_SIZE=CONFIG_FLASH_SIZE*1024) + zephyr_library_sources(${RT1062_BOARD_DIR}/xip/${FLASH_CONF}) + zephyr_library_include_directories(${RT1062_BOARD_DIR}/xip) + endif() + if(CONFIG_DEVICE_CONFIGURATION_DATA) + # Include device configuration data block for RT1050 EVK from NXP's HAL. + # This configuration block may need modification if another SDRAM chip + # is used on your custom board. + zephyr_compile_definitions(XIP_BOOT_HEADER_DCD_ENABLE=1) + zephyr_library_sources(${RT1062_BOARD_DIR}/dcd.c) + endif() +endif() + +if(CONFIG_MCUX_GPT_TIMER) + message(WARNING "You appear to be using the GPT hardware timer. " + "This timer will enable lower power modes, but at the cost of reduced " + "hardware timer resolution") +endif() diff --git a/boards/arm/mimxrt1062_fmurt6/Kconfig.board b/boards/arm/mimxrt1062_fmurt6/Kconfig.board new file mode 100644 index 00000000000..97c653e75f2 --- /dev/null +++ b/boards/arm/mimxrt1062_fmurt6/Kconfig.board @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: Apache-2.0 +# Copyright 2023 NXP + +config BOARD_MIMXRT1062_FMURT6 + bool "NXP MIMXRT1062-FMURT6" + depends on SOC_SERIES_IMX_RT + select SOC_PART_NUMBER_MIMXRT1062DVL6A diff --git a/boards/arm/mimxrt1062_fmurt6/Kconfig.defconfig b/boards/arm/mimxrt1062_fmurt6/Kconfig.defconfig new file mode 100644 index 00000000000..cae9a37cf60 --- /dev/null +++ b/boards/arm/mimxrt1062_fmurt6/Kconfig.defconfig @@ -0,0 +1,23 @@ +# MIMXRT1062-FMURT6 board + +# SPDX-License-Identifier: Apache-2.0 +# Copyright 2023 NXP + +if BOARD_MIMXRT1062_FMURT6 + +config BOARD + default "mimxrt1062_fmurt6" if BOARD_MIMXRT1062_FMURT6 + +choice CODE_LOCATION + default CODE_FLEXSPI +endchoice + +if NETWORKING + +config NET_L2_ETHERNET + default y + +endif # NETWORKING + + +endif # BOARD_MIMXRT1062_FMURT6 diff --git a/boards/arm/mimxrt1062_fmurt6/board.cmake b/boards/arm/mimxrt1062_fmurt6/board.cmake new file mode 100644 index 00000000000..170cf4a4a9d --- /dev/null +++ b/boards/arm/mimxrt1062_fmurt6/board.cmake @@ -0,0 +1,13 @@ +# +# SPDX-License-Identifier: Apache-2.0 +# +# Copyright 2023 NXP +# + +board_runner_args(pyocd "--target=mimxrt1060") +board_runner_args(jlink "--device=MIMXRT1062xxx6A") + +board_runner_args(jlink "--loader=BankAddr=0x60000000&Loader=HyperFlash") + +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) +include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) diff --git a/boards/arm/mimxrt1062_fmurt6/doc/index.rst b/boards/arm/mimxrt1062_fmurt6/doc/index.rst new file mode 100644 index 00000000000..e1b7f284cc0 --- /dev/null +++ b/boards/arm/mimxrt1062_fmurt6/doc/index.rst @@ -0,0 +1,362 @@ +.. _fmurt6: + +NXP FMURT6 +################## + +Overview +******** + +The MIMXRT1062_FMURT6 adds to the industry's crossover +processor series and expands the i.MX RT series to three scalable families. + +The i.MX RT1062 doubles the On-Chip SRAM to 1MB while keeping pin-to-pin +compatibility with i.MX RT1050. This series introduces additional features +ideal for real-time applications such as High-Speed GPIO, CAN-FD, and +synchronous parallel NAND/NOR/PSRAM controller. The i.MX RT1062 runs on the +Arm® Cortex-M7® core up to 600 MHz. + +.. image:: mimxrt1062_fmurt6.jpg + :align: center + :alt: MIMXRT1062_FMURT6 + +Hardware +******** + +- MIMXRT1062DVL6B MCU (600 MHz, 1024 KB on-chip memory) + +- Memory + + - 256 Mbit SDRAM + - 512 Mbit Hyper Flash + - TF socket for SD card + +- Ethernet + + - 10/100 Mbit/s Ethernet PHY + +- USB + + - USB 2.0 OTG connector + - USB 2.0 host connector + +- Audio + + - 3.5 mm audio stereo headphone jack + - Board-mounted microphone + - Left and right speaker out connectors + +- Power + + - 5 V DC jack + +- Debug + + - JTAG 20-pin connector + - OpenSDA with DAPLink + +- Sensor + + - BMI088 6-axis e-compass + +- Expansion port + + - Arduino interface + +- CAN bus connector + +For more information about the MIMXRT1062 SoC and MIMXRT1062-FMURT6 board, see +these references: + +- `i.MX RT1060 Website`_ +- `i.MX RT1060 Reference Manual`_ +- `MIMXRT1062-FMURT6 User Guide`_ +- `MIMXRT1062-FMURT6 Schematics`_ + +Supported Features +================== + +The mimxrt1062_fmurt6 board configuration supports the hardware features listed +below. For additional features not yet supported, please also refer to the +:ref:`mimxrt1064_evk` , which is the superset board in NXP's i.MX RT10xx family. +NXP prioritizes enabling the superset board with NXP's Full Platform Support for +Zephyr. Therefore, the mimxrt1064_evk board may have additional features +already supported, which can also be re-used on this mimxrt1060_evk board: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| SYSTICK | on-chip | systick | ++-----------+------------+-------------------------------------+ +| DISPLAY | on-chip | display | ++-----------+------------+-------------------------------------+ +| FLASH | on-chip | QSPI hyper flash | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| SPI | on-chip | spi | ++-----------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++-----------+------------+-------------------------------------+ +| ADC | on-chip | adc | ++-----------+------------+-------------------------------------+ +| WATCHDOG | on-chip | watchdog | ++-----------+------------+-------------------------------------+ +| PWM | on-chip | pwm | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-------------------------------------+ +| ENET | on-chip | ethernet | ++-----------+------------+-------------------------------------+ +| USB | on-chip | USB device | ++-----------+------------+-------------------------------------+ +| CAN | on-chip | can | ++-----------+------------+-------------------------------------+ +| DMA | on-chip | dma | ++-----------+------------+-------------------------------------+ +| GPT | on-chip | gpt | ++-----------+------------+-------------------------------------+ +| FLEXSPI | on-chip | flash programming | ++-----------+------------+-------------------------------------+ + +The default configuration can be found in the defconfig file: +``boards/arm/mimxrt1062_fmurt6/mimxrt1062_fmurt6_defconfig`` + +Other hardware features are not currently supported by the port. + +Connections and I/Os +==================== + +The MIMXRT1062 SoC has five pairs of pinmux/gpio controllers. + ++---------------+-----------------+---------------------------+ +| Name | Function | Usage | ++===============+=================+===========================+ +| GPIO_AD_B1_08 | FLEXCAN1 TX | CAN | ++---------------+-----------------+---------------------------+ +| GPIO_B0_03 | FLEXCAN1 RX | CAN | ++---------------+-----------------+---------------------------+ +| GPIO_AD_B0_06 | PWM2A0 | PWM | ++---------------+-----------------+---------------------------+ +| GPIO_EMC_08 | PWM2A1 | PWM | ++---------------+-----------------+---------------------------+ +| GPIO_EMC_10 | PWM2A2 | PWM | ++---------------+-----------------+---------------------------+ +| GPIO_AD_B0_09 | PWM2A3 | PWM | ++---------------+-----------------+---------------------------+ +| GPIO_EMC_31 | LPUART7_TX | UART Console | ++---------------+-----------------+---------------------------+ +| GPIO_EMC_32 | LPUART7_RX | UART Console | ++---------------+-----------------+---------------------------+ +| GPIO_B0_04 | LPI2C2_SCL | I2C | ++---------------+-----------------+---------------------------+ +| GPIO_B0_05 | LPI2C2_SDA | I2C | ++---------------+-----------------+---------------------------+ +| GPIO_AD_B1_00 | LPI2C1_SCL | I2C | ++---------------+-----------------+---------------------------+ +| GPIO_AD_B1_01 | LPI2C1_SDA | I2C | ++---------------+-----------------+---------------------------+ +| GPIO_AD_B0_12 | LPI2C4_SCL | I2C | ++---------------+-----------------+---------------------------+ +| GPIO_AD_B0_13 | LPI2C4_SDA | I2C | ++---------------+-----------------+---------------------------+ +| WAKEUP | GPIO | SW0 | ++---------------+-----------------+---------------------------+ +| GPIO_B1_01 | ENET_RX_DATA00 | Ethernet | ++---------------+-----------------+---------------------------+ +| GPIO_B1_02 | ENET_RX_DATA01 | Ethernet | ++---------------+-----------------+---------------------------+ +| GPIO_B1_03 | ENET_RX_EN | Ethernet | ++---------------+-----------------+---------------------------+ +| GPIO_B0_12 | ENET_TX_DATA00 | Ethernet | ++---------------+-----------------+---------------------------+ +| GPIO_B0_13 | ENET_TX_DATA01 | Ethernet | ++---------------+-----------------+---------------------------+ +| GPIO_B0_14 | ENET_TX_EN | Ethernet | ++---------------+-----------------+---------------------------+ +| GPIO_B0_15 | ENET_REF_CLK | Ethernet | ++---------------+-----------------+---------------------------+ +| GPIO_B1_00 | ENET_RX_ER | Ethernet | ++---------------+-----------------+---------------------------+ +| GPIO_B1_12 | GPIO | SD Card | ++---------------+-----------------+---------------------------+ +| GPIO_B1_14 | USDHC1_VSELECT | SD Card | ++---------------+-----------------+---------------------------+ +| GPIO_EMC_40 | ENET_MDC | Ethernet | ++---------------+-----------------+---------------------------+ +| GPIO_B0_01 | ENET_MDIO | Ethernet | ++---------------+-----------------+---------------------------+ +| GPIO_SD_B0_00 | USDHC1_CMD | SD Card | ++---------------+-----------------+---------------------------+ +| GPIO_SD_B0_01 | USDHC1_CLK | SD Card | ++---------------+-----------------+---------------------------+ +| GPIO_SD_B0_02 | USDHC1_DATA0 | SD Card | ++---------------+-----------------+---------------------------+ +| GPIO_SD_B0_03 | USDHC1_DATA1 | SD Card | ++---------------+-----------------+---------------------------+ +| GPIO_SD_B0_04 | USDHC1_DATA2 | SD Card | ++---------------+-----------------+---------------------------+ +| GPIO_SD_B0_05 | USDHC1_DATA3 | SD Card | ++---------------+-----------------+---------------------------+ +| GPIO_EMC_27 | LPSPI1_SCK | SPI | ++---------------+-----------------+---------------------------+ +| GPIO_EMC_28 | LPSPI1_SDO | SPI | ++---------------+-----------------+---------------------------+ +| GPIO_EMC_29 | LPSPI1_SDI | SPI | ++---------------+-----------------+---------------------------+ +| GPIO_EMC_00 | LPSPI2_SCK | SPI | ++---------------+-----------------+---------------------------+ +| GPIO_EMC_02 | LPSPI2_SDO | SPI | ++---------------+-----------------+---------------------------+ +| GPIO_EMC_03 | LPSPI2_SDI | SPI | ++---------------+-----------------+---------------------------+ +| GPIO_AD_B1_15 | LPSPI3_SCK | SPI | ++---------------+-----------------+---------------------------+ +| GPIO_AD_B1_14 | LPSPI3_SDO | SPI | ++---------------+-----------------+---------------------------+ +| GPIO_AD_B1_13 | LPSPI3_SDI | SPI | ++---------------+-----------------+---------------------------+ +| GPIO_AD_B1_11 | ADC | ADC1 Channel 0 | ++---------------+-----------------+---------------------------+ +| GPIO_AD_B1_09 | ADC | ADC1 Channel 14 | ++---------------+-----------------+---------------------------+ +| GPIO_AD_B0_15 | ADC | ADC1 Channel 4 | ++---------------+-----------------+---------------------------+ +| GPIO_AD_B1_02 | UART2_TX_GPS1 | UART GPS | ++---------------+-----------------+---------------------------+ +| GPIO_AD_B1_03 | UART2_RX_GPS1 | UART GPS | ++---------------+-----------------+---------------------------+ + + +System Clock +============ + +The MIMXRT1062 SoC is configured to use SysTick as the system clock source, +running at 600MHz. + +When power management is enabled, the 32 KHz low frequency +oscillator on the board will be used as a source for the GPT timer to +generate a system clock. This clock enables lower power states, at the +cost of reduced resolution + + +Serial Port +=========== + +The MIMXRT1062 SoC has eight UARTs. ``LPUART7`` is configured for the console, +``LPUART8 and 2`` for GPS/MAG, ``LPUART3 and 4`` for Telemetry and the remaining are not used. + +Programming and Debugging +************************* + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +Configuring a Debug Probe +========================= + +A debug probe is used for both flashing and debugging the board. This board is +configured by default to use the :ref:`opensda-daplink-onboard-debug-probe`, +however the :ref:`pyocd-debug-host-tools` do not yet support programming the +external flashes on this board so you must reconfigure the board for one of the +following debug probes instead. + +.. _Using J-Link RT1062: + +Using J-Link +--------------------------------- + +Install the :ref:`jlink-debug-host-tools` and make sure they are in your search +path. + +For Hyperflash support on i.MxRT106x use JLink_V780 or above. + +There are two options: the onboard debug circuit can be updated with Segger +J-Link firmware, or :ref:`jlink-external-debug-probe` can be attached to the +FMURT6 on J23 FMU Debug Port. +Run JLink.exe and choose device / core as MIMXRT106A-ALEXA. + +Configuring a Console +===================== + +Regardless of your choice in debug probe, we will use the OpenSDA +microcontroller as a usb-to-serial adapter for the serial console. + +Connect a USB cable from your PC to PixHawk debug adapter. + +Use the following settings with your serial terminal of choice (minicom, putty, +etc.): + +- Speed: 115200 +- Data: 8 bits +- Parity: None +- Stop bits: 1 + +Using SWO +--------- +SWO can be used as a logging backend, by setting ``CONFIG_LOG_BACKEND_SWO=y``. +Your SWO viewer should be configured with a CPU frequency of 132MHz, and +SWO frequency of 7500KHz. + +Flashing +======== + +Here is an example for the :ref:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: mimxrt1062_fmurt6 + :goals: flash + +Open a serial terminal, reset the board (press the SW9 button), and you should +see the following message in the terminal: + +.. code-block:: console + + ***** Booting Zephyr OS v3.20.0 ***** + Hello World! mimxrt1062_fmurt6 + +Debugging +========= + +Here is an example for the :ref:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: mimxrt1062_fmurt6 + :goals: debug + +Open a serial terminal, step through the application in your debugger, and you +should see the following message in the terminal: + +.. code-block:: console + + ***** Booting Zephyr OS v3.20.0 ***** + Hello World! mimxrt1062_fmurt6 + +Troubleshooting +=============== + +If the west flash or debug commands fail, and the command hangs while executing +runners.jlink, confirm the J-Link debug probe is configured, powered, and +connected to the FMURT6 properly. + +.. _MIMXRT1062-FMURT6 Website: + https://www.nxp.com/part/RDDRONE-FMURT6# + +.. _MIMXRT1062-FMURT6 User Guide: + https://docs.px4.io/master/en/ + +.. _MIMXRT1062-FMURT6 Schematics: + https://github.com/NXPHoverGames/NXP-FMUMRT6 + +.. _i.MX RT1060 Website: + https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-rt-series/i.mx-rt1060-crossover-processor-with-arm-cortex-m7-core:i.MX-RT1060 + +.. _i.MX RT1060 Datasheet: + https://www.nxp.com/docs/en/nxp/data-sheets/IMXRT1060CEC.pdf + +.. _i.MX RT1060 Reference Manual: + https://www.nxp.com/webapp/Download?colCode=IMXRT1060RM diff --git a/boards/arm/mimxrt1062_fmurt6/doc/mimxrt1062_fmurt6.jpg b/boards/arm/mimxrt1062_fmurt6/doc/mimxrt1062_fmurt6.jpg new file mode 100644 index 00000000000..40e1024491f Binary files /dev/null and b/boards/arm/mimxrt1062_fmurt6/doc/mimxrt1062_fmurt6.jpg differ diff --git a/boards/arm/mimxrt1062_fmurt6/mimxrt1062_fmurt6-pinctrl.dtsi b/boards/arm/mimxrt1062_fmurt6/mimxrt1062_fmurt6-pinctrl.dtsi new file mode 100644 index 00000000000..83899828bdf --- /dev/null +++ b/boards/arm/mimxrt1062_fmurt6/mimxrt1062_fmurt6-pinctrl.dtsi @@ -0,0 +1,520 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * Copyright 2023 NXP + * + */ + +#include + +/* Flash RESET pin is DNP here unlike RT1050 */ + +&pinctrl { + /* ADC1 inputs 0 and 15 */ + pinmux_adc1: pinmux_adc1 { + group0 { + pinmux = <&iomuxc_gpio_ad_b1_11_adc1_in0>; + bias-disable; + drive-strength = "r0-6"; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + }; + }; + + pinmux_enet: pinmux_enet { + group0 { + pinmux = <&iomuxc_gpio_b0_15_enet2_ref_clk2>; + drive-strength = "r0-6"; + slew-rate = "fast"; + nxp,speed = "50-mhz"; + bias-pull-down-value = "100k"; + input-enable; + }; + group1 { + pinmux = <&iomuxc_gpio_b1_01_enet2_rx_data0>, + <&iomuxc_gpio_b1_02_enet2_rx_data1>, + <&iomuxc_gpio_b1_03_enet2_rx_en>, + <&iomuxc_gpio_b0_12_enet2_tx_data0>, + <&iomuxc_gpio_b0_13_enet2_tx_data1>, + <&iomuxc_gpio_b0_14_enet2_tx_en>, + <&iomuxc_gpio_b0_00_enet2_mdc>; + drive-strength = "r0-5"; + bias-pull-up-value = "100k"; + slew-rate = "fast"; + nxp,speed = "200-mhz"; + }; + group2 { + pinmux = <&iomuxc_gpio_b1_00_enet2_rx_er>; + bias-pull-down-value = "100k"; + drive-strength = "r0-5"; + slew-rate = "fast"; + nxp,speed = "200-mhz"; + }; + group3 { + pinmux = <&iomuxc_gpio_b0_01_enet2_mdio>; + drive-strength = "r0-5"; + drive-open-drain; + bias-pull-up-value = "100k"; + slew-rate = "fast"; + nxp,speed = "50-mhz"; + }; + }; + + pinmux_sensor: pinmux_sensor { + group0 { + pinmux = <&iomuxc_gpio_emc_13_gpio4_io13>, + <&iomuxc_gpio_emc_09_gpio4_io09>, + <&iomuxc_gpio_emc_06_gpio4_io06>, + <&iomuxc_gpio_emc_41_gpio3_io27>, + <&iomuxc_gpio_ad_b0_00_gpio1_io00>, + <&iomuxc_snvs_pmic_on_req_gpio5_io01>; + drive-strength = "r0-7"; + bias-pull-up; + slew-rate = "fast"; + }; + }; + + pinmux_flexcan1: pinmux_flexcan1 { + group0 { + pinmux = <&iomuxc_gpio_ad_b1_08_flexcan1_tx>, + <&iomuxc_gpio_b0_03_flexcan1_rx>; + drive-strength = "r0-6"; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + }; + }; + + pinmux_flexcan2: pinmux_flexcan2 { + group0 { + pinmux = <&iomuxc_gpio_ad_b0_02_flexcan2_tx>, + <&iomuxc_gpio_ad_b0_03_flexcan2_rx>; + drive-strength = "r0-6"; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + }; + }; + + pinmux_flexcan3: pinmux_flexcan3 { + group0 { + pinmux = <&iomuxc_gpio_emc_36_flexcan3_tx>, + <&iomuxc_gpio_ad_b0_11_flexcan3_rx>; + drive-strength = "r0-6"; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + }; + }; + + /* pwm pins for fmu and io ports */ + pinmux_flexpwm_fmu_ch1: pinmux_flexpwm_fmu_ch1 { + group0 { + pinmux = <&iomuxc_gpio_b0_06_flexpwm2_pwma0>; + + drive-strength = "r0-7"; + slew-rate = "fast"; + nxp,speed = "200-mhz"; + }; + }; + + pinmux_flexpwm_fmu_ch2: pinmux_flexpwm_fmu_ch2 { + group0 { + pinmux = <&iomuxc_gpio_emc_08_flexpwm2_pwma1>; + + drive-strength = "r0-7"; + slew-rate = "fast"; + nxp,speed = "200-mhz"; + }; + }; + + pinmux_flexpwm_fmu_ch3: pinmux_flexpwm_fmu_ch3 { + group0 { + pinmux = <&iomuxc_gpio_emc_10_flexpwm2_pwma2>; + + drive-strength = "r0-7"; + slew-rate = "fast"; + nxp,speed = "200-mhz"; + }; + }; + + pinmux_flexpwm_fmu_ch4: pinmux_flexpwm_fmu_ch4 { + group0 { + pinmux = <&iomuxc_gpio_ad_b0_09_flexpwm2_pwma3>; + + drive-strength = "r0-7"; + slew-rate = "fast"; + nxp,speed = "200-mhz"; + }; + }; + + pinmux_flexpwm_fmu_ch5: pinmux_flexpwm_fmu_ch5 { + group0 { + pinmux = <&iomuxc_gpio_emc_33_flexpwm3_pwma2>; + + drive-strength = "r0-7"; + slew-rate = "fast"; + nxp,speed = "200-mhz"; + }; + }; + + pinmux_flexpwm_fmu_ch6: pinmux_flexpwm_fmu_ch6 { + group0 { + pinmux = <&iomuxc_gpio_emc_30_flexpwm3_pwmb0>; + + drive-strength = "r0-7"; + slew-rate = "fast"; + nxp,speed = "200-mhz"; + }; + }; + + pinmux_flexpwm_fmu_ch7: pinmux_flexpwm_fmu_ch7 { + group0 { + pinmux = <&iomuxc_gpio_emc_04_flexpwm4_pwma2>; + + drive-strength = "r0-7"; + slew-rate = "fast"; + nxp,speed = "200-mhz"; + }; + }; + + pinmux_flexpwm_fmu_ch8: pinmux_flexpwm_fmu_ch8 { + group0 { + pinmux = <&iomuxc_gpio_emc_01_flexpwm4_pwmb0>; + + drive-strength = "r0-7"; + slew-rate = "fast"; + nxp,speed = "200-mhz"; + }; + }; + + pinmux_flexspi1: pinmux_flexspi1 { + group0 { + pinmux = <&iomuxc_gpio_sd_b1_05_flexspi_a_dqs>; + drive-strength = "r0-6"; + input-schmitt-enable; + bias-pull-down; + bias-pull-down-value = "100k"; + slew-rate = "fast"; + nxp,speed = "200-mhz"; + input-enable; + }; + group1 { + pinmux = <&iomuxc_gpio_sd_b1_03_flexspi_b_data0>, + <&iomuxc_gpio_sd_b1_00_flexspi_b_data3>, + <&iomuxc_gpio_sd_b1_01_flexspi_b_data2>, + <&iomuxc_gpio_sd_b1_02_flexspi_b_data1>, + <&iomuxc_gpio_sd_b1_04_flexspi_b_sclk>, + <&iomuxc_gpio_sd_b1_06_flexspi_a_ss0_b>, + <&iomuxc_gpio_sd_b1_07_flexspi_a_sclk>, + <&iomuxc_gpio_sd_b1_08_flexspi_a_data0>, + <&iomuxc_gpio_sd_b1_09_flexspi_a_data1>, + <&iomuxc_gpio_sd_b1_10_flexspi_a_data2>, + <&iomuxc_gpio_sd_b1_11_flexspi_a_data3>; + drive-strength = "r0-6"; + slew-rate = "fast"; + nxp,speed = "200-mhz"; + input-enable; + }; + }; + + /* Configures pin routing and optionally pin electrical features. */ + pinmux_lpi2c1: pinmux_lpi2c1 { + group0 { + pinmux = <&iomuxc_gpio_ad_b1_01_lpi2c1_sda>, + <&iomuxc_gpio_ad_b1_00_lpi2c1_scl>; + drive-strength = "r0-6"; + drive-open-drain; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + input-enable; + }; + }; + + pinmux_lpi2c2: pinmux_lpi2c2 { + group0 { + pinmux = <&iomuxc_gpio_b0_05_lpi2c2_sda>, + <&iomuxc_gpio_b0_04_lpi2c2_scl>; + drive-strength = "r0-6"; + drive-open-drain; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + input-enable; + }; + }; + + pinmux_lpi2c4: pinmux_lpi2c4 { + group0 { + pinmux = <&iomuxc_gpio_ad_b0_13_lpi2c4_sda>, + <&iomuxc_gpio_ad_b0_12_lpi2c4_scl>; + drive-strength = "r0-6"; + drive-open-drain; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + input-enable; + }; + }; + + /* SPI1 SENSOR - ICM20602 */ + pinmux_lpspi1: pinmux_lpspi1 { + group0 { + pinmux = <&iomuxc_gpio_emc_37_gpio3_io23>, + <&iomuxc_gpio_emc_27_lpspi1_sck>, + <&iomuxc_gpio_emc_29_lpspi1_sdi>, + <&iomuxc_gpio_emc_28_lpspi1_sdo>, + <&iomuxc_gpio_emc_12_gpio4_io12>; + drive-strength = "r0-7"; + slew-rate = "fast"; + nxp,speed = "100-mhz"; + bias-pull-up-value = "47k"; + }; + }; + + /* SPI2 SENSOR - ISM330 */ + pinmux_lpspi2: pinmux_lpspi2 { + group0 { + pinmux = <&iomuxc_gpio_emc_34_gpio3_io20>, + <&iomuxc_gpio_emc_00_lpspi2_sck>, + <&iomuxc_gpio_emc_03_lpspi2_sdi>, + <&iomuxc_gpio_emc_02_lpspi2_sdo>; + drive-strength = "r0-6"; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + }; + }; + + /* SPI3 SENSOR - BMI088 */ + pinmux_lpspi3: pinmux_lpspi3 { + group0 { + pinmux = <&iomuxc_gpio_b1_15_gpio2_io31>, + <&iomuxc_gpio_b1_10_gpio2_io26>, + <&iomuxc_gpio_ad_b1_15_lpspi3_sck>, + <&iomuxc_gpio_ad_b1_13_lpspi3_sdi>, + <&iomuxc_gpio_ad_b1_14_lpspi3_sdo>, + <&iomuxc_gpio_emc_16_gpio4_io16>; + drive-strength = "r0-6"; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + }; + }; + + /* FRAM */ + pinmux_lpspi4: pinmux_lpspi4 { + group0 { + pinmux = <&iomuxc_gpio_b1_14_gpio2_io30>, + <&iomuxc_gpio_b1_07_lpspi4_sck>, + <&iomuxc_gpio_b1_05_lpspi4_sdi>, + <&iomuxc_gpio_b0_02_lpspi4_sdo>; + drive-strength = "r0-6"; + slew-rate = "slow"; + nxp,speed = "200-mhz"; + }; + }; + + /* FMU CONSOLE */ + pinmux_lpuart7: pinmux_lpuart7 { + group0 { + pinmux = <&iomuxc_gpio_emc_32_lpuart7_rx>, + <&iomuxc_gpio_emc_31_lpuart7_tx>; + drive-strength = "r0-6"; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + }; + }; + + pinmux_lpuart7_sleep: pinmux_lpuart7_sleep { + group0 { + pinmux = <&iomuxc_gpio_emc_32_lpuart7_rx>, + <&iomuxc_gpio_emc_31_lpuart7_tx>; + drive-strength = "r0"; + bias-pull-up; + bias-pull-up-value = "100k"; + slew-rate = "slow"; + nxp,speed = "50-mhz"; + }; + }; + + pinmux_lpuart3: pinmux_lpuart3 { + group0 { + pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>, + <&iomuxc_gpio_ad_b1_07_lpuart3_rx>; + drive-strength = "r0-6"; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + }; + }; + + /* Flow control for lpuart3 */ + pinmux_lpuart3_flow_control: pinmux_lpuart3_flow_control { + group0 { + pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>, + <&iomuxc_gpio_ad_b1_07_lpuart3_rx>, + <&iomuxc_gpio_ad_b1_04_lpuart3_cts_b>, + <&iomuxc_gpio_ad_b1_05_lpuart3_rts_b>; + drive-strength = "r0-6"; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + }; + }; + + pinmux_lpuart3_sleep: pinmux_lpuart3_sleep { + group0 { + pinmux = <&iomuxc_gpio_ad_b1_06_gpio1_io22>; + drive-strength = "r0"; + bias-pull-up; + bias-pull-up-value = "100k"; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + }; + group1 { + pinmux = <&iomuxc_gpio_ad_b1_07_lpuart3_rx>; + drive-strength = "r0-6"; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + }; + }; + + pinmux_ptp: pinmux_ptp { + group0 { + pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>, + <&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>; + drive-strength = "r0-6"; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + }; + }; + + /* Note SWO is configured with a cpu frequency of 132MHz and SWO frequency of 7500KHz */ + pinmux_swo: pinmux_swo { + group0 { + pinmux = <&iomuxc_gpio_ad_b0_10_arm_trace_swo>; + bias-disable; + drive-strength = "r0-7"; + slew-rate = "fast"; + nxp,speed = "200-mhz"; + }; + }; + + pinmux_usdhc1: pinmux_usdhc1 { + group0 { + pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>; + bias-disable; + drive-strength = "r0"; + input-schmitt-enable; + slew-rate = "fast"; + nxp,speed = "100-mhz"; + }; + group1 { + pinmux = <&iomuxc_gpio_b1_12_gpio2_io28>, + <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>, + <&iomuxc_gpio_sd_b0_02_usdhc1_data0>, + <&iomuxc_gpio_sd_b0_03_usdhc1_data1>, + <&iomuxc_gpio_sd_b0_04_usdhc1_data2>, + <&iomuxc_gpio_sd_b0_05_usdhc1_data3>; + drive-strength = "r0"; + input-schmitt-enable; + bias-pull-up; + bias-pull-up-value = "47k"; + slew-rate = "fast"; + nxp,speed = "100-mhz"; + }; + group2 { + pinmux = <&iomuxc_gpio_b1_14_usdhc1_vselect>; + drive-strength = "r0-4"; + input-schmitt-enable; + bias-pull-up; + bias-pull-up-value = "47k"; + slew-rate = "fast"; + nxp,speed = "100-mhz"; + }; + group3 { + pinmux = <&iomuxc_gpio_ad_b0_05_gpio1_io05>; + drive-strength = "r0-6"; + slew-rate = "slow"; + nxp,speed = "100-mhz"; + }; + }; + + /* fast pinmux settings for USDHC (over 100 Mhz) */ + pinmux_usdhc1_fast: pinmux_usdhc1_fast { + group0 { + pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>; + bias-disable; + drive-strength = "r0-7"; + input-schmitt-enable; + slew-rate = "fast"; + nxp,speed = "200-mhz"; + }; + group1 { + pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>, + <&iomuxc_gpio_sd_b0_02_usdhc1_data0>, + <&iomuxc_gpio_sd_b0_03_usdhc1_data1>, + <&iomuxc_gpio_sd_b0_04_usdhc1_data2>, + <&iomuxc_gpio_sd_b0_05_usdhc1_data3>; + drive-strength = "r0-7"; + input-schmitt-enable; + bias-pull-up; + bias-pull-up-value = "47k"; + slew-rate = "fast"; + nxp,speed = "200-mhz"; + }; + }; + + /* medium pinmux settings for USDHC (under 100 Mhz) */ + pinmux_usdhc1_med: pinmux_usdhc1_med { + group0 { + pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>; + bias-disable; + drive-strength = "r0-7"; + input-schmitt-enable; + slew-rate = "fast"; + nxp,speed = "100-mhz"; + }; + group1 { + pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>, + <&iomuxc_gpio_sd_b0_02_usdhc1_data0>, + <&iomuxc_gpio_sd_b0_03_usdhc1_data1>, + <&iomuxc_gpio_sd_b0_04_usdhc1_data2>, + <&iomuxc_gpio_sd_b0_05_usdhc1_data3>; + drive-strength = "r0-7"; + input-schmitt-enable; + bias-pull-up; + bias-pull-up-value = "47k"; + slew-rate = "fast"; + nxp,speed = "100-mhz"; + }; + }; + + /* slow pinmux settings for USDHC (under 50 Mhz) */ + pinmux_usdhc1_slow: pinmux_usdhc1_slow { + group0 { + pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>; + bias-disable; + drive-strength = "r0-7"; + input-schmitt-enable; + slew-rate = "fast"; + nxp,speed = "50-mhz"; + }; + group1 { + pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>, + <&iomuxc_gpio_sd_b0_02_usdhc1_data0>, + <&iomuxc_gpio_sd_b0_03_usdhc1_data1>, + <&iomuxc_gpio_sd_b0_04_usdhc1_data2>, + <&iomuxc_gpio_sd_b0_05_usdhc1_data3>; + drive-strength = "r0-7"; + input-schmitt-enable; + bias-pull-up; + bias-pull-up-value = "47k"; + slew-rate = "fast"; + nxp,speed = "50-mhz"; + }; + }; + + /* Wakeup Input Source */ + pinmux_wakeup: pinmux_wakeup { + group0 { + pinmux = <&iomuxc_snvs_wakeup_gpio5_io00>; + drive-strength = "disabled"; + input-schmitt-enable; + bias-pull-up; + bias-pull-up-value = "22k"; + slew-rate = "slow"; + }; + }; +}; diff --git a/boards/arm/mimxrt1062_fmurt6/mimxrt1062_fmurt6.dts b/boards/arm/mimxrt1062_fmurt6/mimxrt1062_fmurt6.dts new file mode 100644 index 00000000000..ceebc7e2e49 --- /dev/null +++ b/boards/arm/mimxrt1062_fmurt6/mimxrt1062_fmurt6.dts @@ -0,0 +1,424 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright 2023 NXP + */ + +/dts-v1/; + +#include +#include "mimxrt1062_fmurt6-pinctrl.dtsi" +#include +#include + +/ { + model = "NXP MIMXRT1062 FMURT6 board"; + compatible = "nxp,mimxrt1062"; + + aliases { + led0 = &green_led; + led1 = &red_led; + watchdog0 = &wdog0; + sdhc0 = &usdhc1; + pwm-0 = &flexpwm2_pwm0; + }; + + chosen { + zephyr,flash-controller = &s26ks512s0; + zephyr,flash = &s26ks512s0; + zephyr,code-partition = &slot0_partition; + zephyr,sram = &ocram; + zephyr,itcm = &itcm; + zephyr,dtcm = &dtcm; + zephyr,console = &lpuart7; + zephyr,shell-uart = &lpuart7; + zephyr,canbus = &flexcan1; + }; + + leds { + compatible = "gpio-leds"; + green_led: led-1 { + gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>; + label = "User LED1"; + }; + red_led: led-2 { + gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; + label = "User LED2"; + }; + }; + + /* This regulator controls VDD_3V3_SD_CARD onboard supply */ + reg-3v3-sdcard { + pinctrl-0 = <&pinmux_sensor>; + pinctrl-names = "default"; + compatible = "regulator-fixed"; + regulator-name = "reg-3v3-sdcard"; + enable-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; + regulator-always-on; + status = "okay"; + }; + + /* This regulator controls VDD_5V_PERIPH onboard supply */ + reg-5v-periph { + pinctrl-0 = <&pinmux_sensor>; + pinctrl-names = "default"; + compatible = "regulator-fixed"; + regulator-name = "reg-5v-periph"; + enable-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; + regulator-always-on; + status = "okay"; + }; + + /* This regulator controls VDD_5V_HIPOWER onboard supply */ + reg-5v-hipower { + pinctrl-0 = <&pinmux_sensor>; + pinctrl-names = "default"; + compatible = "regulator-fixed"; + regulator-name = "reg-5v-hipower"; + enable-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; + regulator-always-on; + status = "okay"; + }; + + /* This regulator controls the 3V3_S line, which powers sensors on-board. */ + reg-3v3-sensor { + pinctrl-0 = <&pinmux_sensor>; + pinctrl-names = "default"; + compatible = "regulator-fixed"; + regulator-name = "reg-3v3-sensor"; + enable-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>; + startup-delay-us = <2000>; + regulator-always-on; + status = "okay"; + }; + + /* This regulator controls VDD_3V3_SPEKTRUM onboard supply */ + reg-3v3-spektrum { + pinctrl-0 = <&pinmux_sensor>; + pinctrl-names = "default"; + compatible = "regulator-fixed"; + regulator-name = "reg-3v3-spektrum"; + enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; + regulator-always-on; + status = "okay"; + }; + + /* This regulator controls ETH_VDD_3V3 supply to power up the TJA1103 PHY */ + reg-eth-power { + pinctrl-0 = <&pinmux_sensor>; + pinctrl-names = "default"; + compatible = "regulator-fixed"; + regulator-name = "reg-eth-power"; + enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; + regulator-always-on; + status = "okay"; + }; +}; + +&flexcan1 { + status = "okay"; + pinctrl-0 = <&pinmux_flexcan1>; + pinctrl-names = "default"; + bus-speed = <125000>; + can-transceiver { + max-bitrate = <5000000>; + }; +}; + +&flexcan2 { + status = "disabled"; + pinctrl-0 = <&pinmux_flexcan2>; + pinctrl-names = "default"; + bus-speed = <125000>; + can-transceiver { + max-bitrate = <5000000>; + }; +}; + +&flexcan3 { + status = "disabled"; + pinctrl-0 = <&pinmux_flexcan3>; + pinctrl-names = "default"; + bus-speed = <125000>; + can-transceiver { + max-bitrate = <5000000>; + }; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&gpio3 { + status = "okay"; +}; + +&gpio4 { + status = "okay"; +}; + +&gpio5 { + status = "okay"; +}; + +&gpio6 { + status = "okay"; +}; + +&gpio7 { + status = "okay"; +}; + +&gpio8 { + status = "okay"; +}; + +&gpio9 { + status = "okay"; +}; + +&adc1 { + status = "okay"; + pinctrl-0 = <&pinmux_adc1>; + pinctrl-names = "default"; +}; + +&flexspi { + status = "okay"; + ahb-prefetch; + ahb-read-addr-opt; + ahb-bufferable; + ahb-cacheable; + sck-differential-clock; + combination-mode; + rx-clock-source = <3>; + reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(64)>; + s26ks512s0: s26ks512s@0 { + compatible = "nxp,imx-flexspi-hyperflash"; + size = ; + reg = <0>; + spi-max-frequency = <166000000>; + word-addressable; + cs-interval-unit = <1>; + cs-interval = <2>; + cs-hold-time = <0>; + cs-setup-time = <3>; + data-valid-time = <1>; + column-space = <3>; + ahb-write-wait-unit = <2>; + ahb-write-wait-interval = <20>; + status = "okay"; + erase-block-size = <4096>; + write-block-size = <16>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 DT_SIZE_K(256)>; + }; + slot0_partition: partition@40000 { + label = "image-0"; + reg = <0x00040000 DT_SIZE_M(3)>; + }; + slot1_partition: partition@340000 { + label = "image-1"; + reg = <0x00340000 DT_SIZE_M(3)>; + }; + scratch_partition: partition@640000 { + label = "image-scratch"; + reg = <0x00640000 DT_SIZE_K(768)>; + }; + storage_partition: partition@700000 { + label = "storage"; + reg = <0x00700000 DT_SIZE_M(557)>; + }; + }; + }; +}; + +&lpi2c1 { + status = "okay"; + pinctrl-0 = <&pinmux_lpi2c1>; + pinctrl-names = "default"; + +}; + +&lpi2c2 { + status = "okay"; + pinctrl-0 = <&pinmux_lpi2c2>; + pinctrl-names = "default"; + + bmp388: bmp388@76 { + compatible = "bosch,bmp388"; + reg = <0x76>; + status = "okay"; + }; +}; + +&lpi2c4 { + status = "okay"; + pinctrl-0 = <&pinmux_lpi2c2>; + pinctrl-names = "default"; + + bmm150: bmm150@10 { + compatible = "bosch,bmm150"; + status = "disabled"; + reg = <0x10>; + }; + +}; + +&lpuart7 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&pinmux_lpuart7>; + pinctrl-1 = <&pinmux_lpuart7_sleep>; + pinctrl-names = "default", "sleep"; +}; + +&lpspi1 { + status = "okay"; + pinctrl-0 = <&pinmux_lpspi1>; + pinctrl-names = "default"; + cs-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; + clock-frequency = ; +}; + +&lpspi2 { + status = "disabled"; + pinctrl-0 = <&pinmux_lpspi2>; + pinctrl-names = "default"; + clock-frequency = ; + + ism330dhcx: ism330dhcx@0 { + compatible = "st,ism330dhcx"; + status = "disabled"; + spi-max-frequency = <1000000>; + reg = <0>; + }; +}; + + +&lpspi3 { + status = "okay"; + pinctrl-0 = <&pinmux_lpspi3>; + pinctrl-names = "default"; + /* Accelerometer */ + /* Gyroscope */ + cs-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>, + <&gpio2 26 GPIO_ACTIVE_LOW>; + + clock-frequency = ; +}; + +&flexpwm2_pwm0 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm_fmu_ch1>; + pinctrl-names = "default"; +}; + +&flexpwm2_pwm1 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm_fmu_ch2>; + pinctrl-names = "default"; +}; + +&flexpwm2_pwm2 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm_fmu_ch3>; + pinctrl-names = "default"; +}; + +&flexpwm2_pwm3 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm_fmu_ch4>; + pinctrl-names = "default"; +}; + +&flexpwm3_pwm2 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm_fmu_ch5>; + pinctrl-names = "default"; +}; + +&flexpwm3_pwm0 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm_fmu_ch6>; + pinctrl-names = "default"; +}; + +&flexpwm4_pwm2 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm_fmu_ch7>; + pinctrl-names = "default"; +}; + +&flexpwm4_pwm0 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm_fmu_ch8>; + pinctrl-names = "default"; +}; + +&enet2 { + status = "okay"; + pinctrl-0 = <&pinmux_enet>; + pinctrl-names = "default"; + phy-addr = <0>; +}; + +zephyr_udc0: &usb1 { + status = "okay"; +}; + +&usdhc1 { + status = "okay"; + power-delay-ms = <1000>; + pwr-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + cd-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&pinmux_usdhc1>; + pinctrl-1 = <&pinmux_usdhc1_slow>; + pinctrl-2 = <&pinmux_usdhc1_med>; + pinctrl-3 = <&pinmux_usdhc1_fast>; + pinctrl-names = "default", "slow", "med", "fast"; + sdmmc { + compatible = "zephyr,sdmmc-disk"; + status = "okay"; + }; +}; + +&wdog0 { + status = "okay"; +}; + +&edma0 { + status = "okay"; +}; + +/* GPT and Systick are enabled. If power management is enabled, the GPT + * timer will be used instead of systick, as allows the core clock to + * be gated. + */ +&gpt_hw_timer { + status = "okay"; +}; + +&systick { + status = "okay"; +}; + +&iomuxcgpr { + status = "okay"; +}; + +&itm { + pinctrl-0 = <&pinmux_swo>; + pinctrl-names = "default"; +}; diff --git a/boards/arm/mimxrt1062_fmurt6/mimxrt1062_fmurt6.yaml b/boards/arm/mimxrt1062_fmurt6/mimxrt1062_fmurt6.yaml new file mode 100644 index 00000000000..35732dd66b4 --- /dev/null +++ b/boards/arm/mimxrt1062_fmurt6/mimxrt1062_fmurt6.yaml @@ -0,0 +1,30 @@ +# +# SPDX-License-Identifier: Apache-2.0 +# +# Copyright 2023 NXP +# + +identifier: mimxrt1062_fmurt6 +name: NXP MIMXRT1062-FMURT6 +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +ram: 768 +flash: 65536 +supported: + - counter + - uart + - dma + - gpio + - i2c + - netif:eth + - sdhc + - spi + - usb_device + - can + - watchdog + - adc + - pwm diff --git a/boards/arm/mimxrt1062_fmurt6/mimxrt1062_fmurt6_defconfig b/boards/arm/mimxrt1062_fmurt6/mimxrt1062_fmurt6_defconfig new file mode 100644 index 00000000000..4efad5e51cb --- /dev/null +++ b/boards/arm/mimxrt1062_fmurt6/mimxrt1062_fmurt6_defconfig @@ -0,0 +1,20 @@ +# +# SPDX-License-Identifier: Apache-2.0 +# +# Copyright 2023 NXP +# + +CONFIG_SOC_MIMXRT1062=y +CONFIG_SOC_SERIES_IMX_RT=y +CONFIG_BOARD_MIMXRT1062_FMURT6=y +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_GPIO=y +CONFIG_ARM_MPU=y +CONFIG_HW_STACK_PROTECTION=y +CONFIG_PINCTRL=y + +# Enable Regulators +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_INIT_PRIORITY=75 diff --git a/samples/basic/servo_motor/boards/mimxrt1062_fmurt6.overlay b/samples/basic/servo_motor/boards/mimxrt1062_fmurt6.overlay new file mode 100644 index 00000000000..d5d6d4cf6d4 --- /dev/null +++ b/samples/basic/servo_motor/boards/mimxrt1062_fmurt6.overlay @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: Apache-2.0 */ +/* Copyright 2023 NXP */ +/ { + servo: servo { + compatible = "pwm-servo"; + pwms = <&flexpwm2_pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; /* FMU_CH1 */ + /* <&flexpwm2_pwm1 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>, */ /* FMU_CH2 */ + /* <&flexpwm2_pwm2 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>, */ /* FMU_CH3 */ + /* <&flexpwm2_pwm3 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>, */ /* FMU_CH4 */ + /* <&flexpwm3_pwm2 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>,*/ /* FMU_CH5 */ + /* <&flexpwm3_pwm0 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>; */ /* FMU_CH6 */ + /* <&flexpwm4_pwm2 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; */ /* FMU_CH7 */ + /* <&flexpwm4_pwm0 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>; */ /* FMU_CH8 */ + min-pulse = ; + max-pulse = ; + }; +}; diff --git a/samples/sensor/sensor_shell/boards/mimxrt1062_fmurt6.conf b/samples/sensor/sensor_shell/boards/mimxrt1062_fmurt6.conf new file mode 100644 index 00000000000..60192d3c11d --- /dev/null +++ b/samples/sensor/sensor_shell/boards/mimxrt1062_fmurt6.conf @@ -0,0 +1 @@ +CONFIG_BMP388_TRIGGER_NONE=y diff --git a/tests/drivers/adc/adc_api/boards/mimxrt1062_fmurt6.overlay b/tests/drivers/adc/adc_api/boards/mimxrt1062_fmurt6.overlay new file mode 100644 index 00000000000..7b7c7e71ab7 --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/mimxrt1062_fmurt6.overlay @@ -0,0 +1,34 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright 2023 NXP + */ + +#include + +/ { + zephyr,user { + io-channels = <&adc1 0>, <&adc1 1>; + }; +}; + +&adc1 { + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@1 { + reg = <1>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; +};