soc: rt11xx: enable usb pll clock

USB pll clock should be enabled if USB driver is used. Add required
configuration for USB pll clock.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2022-02-17 17:09:40 -06:00 committed by Marti Bolivar
commit 8156299bda
2 changed files with 19 additions and 1 deletions

View file

@ -306,6 +306,7 @@ config SOC_MIMXRT1176_CM7
select HAS_MCUX_ENET
select HAS_MCUX_GPC
select HAS_MCUX_I2S
select HAS_MCUX_USB_EHCI
config SOC_MIMXRT1176_CM4
bool "SOC_MIMXRT1176_CM4"
@ -364,6 +365,7 @@ config SOC_MIMXRT1166_CM7
select HAS_MCUX_USDHC2
select HAS_MCUX_ENET
select HAS_MCUX_GPC
select HAS_MCUX_USB_EHCI
config SOC_MIMXRT1166_CM4

View file

@ -24,7 +24,7 @@
#endif
#if CONFIG_USB_DC_NXP_EHCI /* USB PHY condfiguration */
#define BOARD_USB_PHY_D_CAL (0x0CU)
#define BOARD_USB_PHY_D_CAL (0x07U)
#define BOARD_USB_PHY_TXCAL45DP (0x06U)
#define BOARD_USB_PHY_TXCAL45DM (0x06U)
#endif
@ -409,6 +409,22 @@ static ALWAYS_INLINE void clock_init(void)
CLOCK_SetRootClock(kCLOCK_Root_Gpt1, &rootCfg);
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usb1), okay) && CONFIG_USB_DC_NXP_EHCI
CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usb480M,
DT_PROP_BY_PHANDLE(DT_NODELABEL(usb1), clocks, clock_frequency));
CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M,
DT_PROP_BY_PHANDLE(DT_NODELABEL(usb1), clocks, clock_frequency));
USB_EhciPhyInit(kUSB_ControllerEhci0, CPU_XTAL_CLK_HZ, &usbPhyConfig);
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usb2), okay) && CONFIG_USB_DC_NXP_EHCI
CLOCK_EnableUsbhs1PhyPllClock(kCLOCK_Usb480M,
DT_PROP_BY_PHANDLE(DT_NODELABEL(usb2), clocks, clock_frequency));
CLOCK_EnableUsbhs1Clock(kCLOCK_Usb480M,
DT_PROP_BY_PHANDLE(DT_NODELABEL(usb2), clocks, clock_frequency));
USB_EhciPhyInit(kUSB_ControllerEhci1, CPU_XTAL_CLK_HZ, &usbPhyConfig);
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_DISK_DRIVER_SDMMC
/* Configure USDHC1 using SysPll2Pfd2*/
rootCfg.mux = kCLOCK_USDHC1_ClockRoot_MuxSysPll2Pfd2;