From 8151a4e253a45560391ffa0e1d5b35f035ec9ee1 Mon Sep 17 00:00:00 2001 From: Tomasz Bursztyka Date: Tue, 17 Dec 2019 13:04:42 +0100 Subject: [PATCH] soc/xtensa: Generate 2 other DW DMA DT aliases from DTS options 2 other DMA instances exist along with the first one. Signed-off-by: Tomasz Bursztyka --- soc/xtensa/intel_s1000/dts_fixup.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/soc/xtensa/intel_s1000/dts_fixup.h b/soc/xtensa/intel_s1000/dts_fixup.h index c080ec10bce..446d26646c4 100644 --- a/soc/xtensa/intel_s1000/dts_fixup.h +++ b/soc/xtensa/intel_s1000/dts_fixup.h @@ -74,4 +74,22 @@ #define DT_DMA_DW_0_IRQ_FLAGS \ DT_SNPS_DESIGNWARE_DMA_7C000_IRQ_0_SENSE +#define DT_DMA_DW_1_NAME DT_SNPS_DESIGNWARE_DMA_7D000_LABEL +#define DT_DMA_DW_1_BASE_ADDR \ + DT_SNPS_DESIGNWARE_DMA_7D000_BASE_ADDRESS +#define DT_DMA_DW_1_IRQ DT_SNPS_DESIGNWARE_DMA_7D000_IRQ_0 +#define DT_DMA_DW_1_IRQ_PRI \ + DT_SNPS_DESIGNWARE_DMA_7D000_IRQ_0_PRIORITY +#define DT_DMA_DW_1_IRQ_FLAGS \ + DT_SNPS_DESIGNWARE_DMA_7D000_IRQ_0_SENSE + +#define DT_DMA_DW_2_NAME DT_SNPS_DESIGNWARE_DMA_7E000_LABEL +#define DT_DMA_DW_2_BASE_ADDR \ + DT_SNPS_DESIGNWARE_DMA_7E000_BASE_ADDRESS +#define DT_DMA_DW_2_IRQ DT_SNPS_DESIGNWARE_DMA_7E000_IRQ_0 +#define DT_DMA_DW_2_IRQ_PRI \ + DT_SNPS_DESIGNWARE_DMA_7E000_IRQ_0_PRIORITY +#define DT_DMA_DW_2_IRQ_FLAGS \ + DT_SNPS_DESIGNWARE_DMA_7E000_IRQ_0_SENSE + /* End of SoC Level DTS fixup file */