boards: mimxrt1020_evk: Enable ADC on RT1020 EVK
Enables ADC1 on the RT1020 evaluation board. Channels 10 and 11 of this ADC are exposed as pins 1 and 2 of J18 on the evk. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
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6 changed files with 40 additions and 1 deletions
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@ -90,6 +90,8 @@ features:
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+-----------+------------+-------------------------------------+
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+-----------+------------+-------------------------------------+
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| USB | on-chip | USB device |
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| USB | on-chip | USB device |
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+-----------+------------+-------------------------------------+
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+-----------+------------+-------------------------------------+
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| ADC | on-chip | adc |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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The default configuration can be found in the defconfig file:
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``boards/arm/mimxrt1020_evk/mimxrt1020_evk_defconfig``
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``boards/arm/mimxrt1020_evk/mimxrt1020_evk_defconfig``
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@ -164,6 +166,10 @@ The MIMXRT1020 SoC has five pairs of pinmux/gpio controllers.
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+---------------+-----------------+---------------------------+
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+---------------+-----------------+---------------------------+
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| GPIO_SD_B0_06 | USDHC1_CD_B | SD Card |
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| GPIO_SD_B0_06 | USDHC1_CD_B | SD Card |
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+---------------+-----------------+---------------------------+
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+---------------+-----------------+---------------------------+
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| GPIO_AD_B1_10 | ADC | ADC1 Channel 10 |
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+---------------+-----------------+---------------------------+
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| GPIO_AD_B1_11 | ADC | ADC1 Channel 11 |
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+---------------+-----------------+---------------------------+
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System Clock
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System Clock
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============
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============
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@ -158,3 +158,7 @@ zephyr_udc0: &usb1 {
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cd-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
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cd-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
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no-1-8-v;
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no-1-8-v;
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};
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};
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&adc1 {
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status = "okay";
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};
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@ -23,3 +23,4 @@ supported:
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- netif:eth
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- netif:eth
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- spi
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- spi
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- usb_device
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- usb_device
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- adc
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@ -262,6 +262,21 @@ static int mimxrt1020_evk_init(const struct device *dev)
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imxrt_usdhc_pinmux_cb_register(mimxrt1020_evk_usdhc_pinmux);
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imxrt_usdhc_pinmux_cb_register(mimxrt1020_evk_usdhc_pinmux);
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#endif
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(adc1), okay) && CONFIG_ADC
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/* ADC1 Channel 10 and 11 are on pins 1 and 2 of J18 */
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/* ADC1 Channel 10 */
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_10_GPIO1_IO26, 0U);
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/* ADC1 Channel 11 */
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_11_GPIO1_IO27, 0U);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_10_GPIO1_IO26,
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IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
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IOMUXC_SW_PAD_CTL_PAD_DSE(6));
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_11_GPIO1_IO27,
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IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
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IOMUXC_SW_PAD_CTL_PAD_DSE(6));
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#endif
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return 0;
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return 0;
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}
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}
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12
samples/drivers/adc/boards/mimxrt1020_evk.overlay
Normal file
12
samples/drivers/adc/boards/mimxrt1020_evk.overlay
Normal file
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@ -0,0 +1,12 @@
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/*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Copyright (c) 2021 NXP
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*/
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/ {
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zephyr,user {
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/* adjust channel number according to pinmux in board.dts */
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io-channels = <&adc1 10>;
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};
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};
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@ -301,7 +301,8 @@
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defined(CONFIG_BOARD_MIMXRT1060_EVK) || \
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defined(CONFIG_BOARD_MIMXRT1060_EVK) || \
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defined(CONFIG_BOARD_MIMXRT1024_EVK) || \
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defined(CONFIG_BOARD_MIMXRT1024_EVK) || \
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defined(CONFIG_BOARD_MIMXRT1010_EVK) || \
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defined(CONFIG_BOARD_MIMXRT1010_EVK) || \
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defined(CONFIG_BOARD_MIMXRT1015_EVK)
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defined(CONFIG_BOARD_MIMXRT1015_EVK) || \
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defined(CONFIG_BOARD_MIMXRT1020_EVK)
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#define ADC_DEVICE_NAME DT_LABEL(DT_INST(0, nxp_mcux_12b1msps_sar))
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#define ADC_DEVICE_NAME DT_LABEL(DT_INST(0, nxp_mcux_12b1msps_sar))
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#define ADC_RESOLUTION 12
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#define ADC_RESOLUTION 12
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#define ADC_GAIN ADC_GAIN_1
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#define ADC_GAIN ADC_GAIN_1
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