boards: mimxrt1020_evk: Enable ADC on RT1020 EVK

Enables ADC1 on the RT1020 evaluation board. Channels 10 and 11 of this
ADC are exposed as pins 1 and 2 of J18 on the evk.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2021-10-12 10:01:41 -05:00 committed by Carles Cufí
commit 813a74d415
6 changed files with 40 additions and 1 deletions

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@ -90,6 +90,8 @@ features:
+-----------+------------+-------------------------------------+
| USB | on-chip | USB device |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
The default configuration can be found in the defconfig file:
``boards/arm/mimxrt1020_evk/mimxrt1020_evk_defconfig``
@ -164,6 +166,10 @@ The MIMXRT1020 SoC has five pairs of pinmux/gpio controllers.
+---------------+-----------------+---------------------------+
| GPIO_SD_B0_06 | USDHC1_CD_B | SD Card |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_10 | ADC | ADC1 Channel 10 |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_11 | ADC | ADC1 Channel 11 |
+---------------+-----------------+---------------------------+
System Clock
============

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@ -158,3 +158,7 @@ zephyr_udc0: &usb1 {
cd-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
no-1-8-v;
};
&adc1 {
status = "okay";
};

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@ -23,3 +23,4 @@ supported:
- netif:eth
- spi
- usb_device
- adc

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@ -262,6 +262,21 @@ static int mimxrt1020_evk_init(const struct device *dev)
imxrt_usdhc_pinmux_cb_register(mimxrt1020_evk_usdhc_pinmux);
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(adc1), okay) && CONFIG_ADC
/* ADC1 Channel 10 and 11 are on pins 1 and 2 of J18 */
/* ADC1 Channel 10 */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_10_GPIO1_IO26, 0U);
/* ADC1 Channel 11 */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_11_GPIO1_IO27, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_10_GPIO1_IO26,
IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
IOMUXC_SW_PAD_CTL_PAD_DSE(6));
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_11_GPIO1_IO27,
IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif
return 0;
}

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@ -0,0 +1,12 @@
/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2021 NXP
*/
/ {
zephyr,user {
/* adjust channel number according to pinmux in board.dts */
io-channels = <&adc1 10>;
};
};

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@ -301,7 +301,8 @@
defined(CONFIG_BOARD_MIMXRT1060_EVK) || \
defined(CONFIG_BOARD_MIMXRT1024_EVK) || \
defined(CONFIG_BOARD_MIMXRT1010_EVK) || \
defined(CONFIG_BOARD_MIMXRT1015_EVK)
defined(CONFIG_BOARD_MIMXRT1015_EVK) || \
defined(CONFIG_BOARD_MIMXRT1020_EVK)
#define ADC_DEVICE_NAME DT_LABEL(DT_INST(0, nxp_mcux_12b1msps_sar))
#define ADC_RESOLUTION 12
#define ADC_GAIN ADC_GAIN_1