From 804f164432e41db359bafbc9253575eb114a5b44 Mon Sep 17 00:00:00 2001 From: Markus Roppelt Date: Wed, 28 Nov 2018 20:12:55 +0100 Subject: [PATCH] dts: arm: st: Add STM32L433 dtsi file The STM32L433 has the same layout than the STM32L432, additionally it has GPIOD, GPIOE, I2C2, USART3 and SPI2. Also move USART3 and SPI2 out of stm32l4.dtsi since STM32L432 does not have it. Fixes #10909. Signed-off-by: Markus Roppelt --- dts/arm/st/l4/stm32l4.dtsi | 19 ----------- dts/arm/st/l4/stm32l433.dtsi | 64 ++++++++++++++++++++++++++++++++++++ dts/arm/st/l4/stm32l471.dtsi | 20 +++++++++++ dts/arm/st/l4/stm32l4r5.dtsi | 20 +++++++++++ 4 files changed, 104 insertions(+), 19 deletions(-) create mode 100644 dts/arm/st/l4/stm32l433.dtsi diff --git a/dts/arm/st/l4/stm32l4.dtsi b/dts/arm/st/l4/stm32l4.dtsi index 2c39cc5cc25..a8ebf463da2 100644 --- a/dts/arm/st/l4/stm32l4.dtsi +++ b/dts/arm/st/l4/stm32l4.dtsi @@ -116,15 +116,6 @@ label = "UART_2"; }; - usart3: serial@40004800 { - compatible = "st,stm32-usart", "st,stm32-uart"; - reg = <0x40004800 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>; - interrupts = <39 0>; - status = "disabled"; - label = "UART_3"; - }; - lpuart1: serial@40008000 { compatible = "st,stm32-lpuart", "st,stm32-uart"; reg = <0x40008000 0x400>; @@ -171,16 +162,6 @@ label = "SPI_1"; }; - spi2: spi@40003800 { - compatible = "st,stm32-spi-fifo"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x40003800 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>; - interrupts = <36 5>; - status = "disabled"; - label = "SPI_2"; - }; timers1: timers@40012c00 { compatible = "st,stm32-timers"; diff --git a/dts/arm/st/l4/stm32l433.dtsi b/dts/arm/st/l4/stm32l433.dtsi new file mode 100644 index 00000000000..1cf67b4903b --- /dev/null +++ b/dts/arm/st/l4/stm32l433.dtsi @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2018 Markus Roppelt + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@48000000 { + gpiod: gpio@48000c00 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48000c00 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000008>; + label = "GPIOD"; + }; + + gpioe: gpio@48001000 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48001000 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000010>; + label = "GPIOE"; + }; + }; + + i2c2: i2c@40005800 { + compatible = "st,stm32-i2c-v2"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40005800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>; + interrupts = <33 0>, <34 0>; + interrupt-names = "event", "error"; + status = "disabled"; + label= "I2C_2"; + }; + + spi2: spi@40003800 { + compatible = "st,stm32-spi-fifo"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40003800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>; + interrupts = <36 5>; + status = "disabled"; + label = "SPI_2"; + }; + + usart3: serial@40004800 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40004800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>; + interrupts = <39 0>; + status = "disabled"; + label = "UART_3"; + }; + }; +}; \ No newline at end of file diff --git a/dts/arm/st/l4/stm32l471.dtsi b/dts/arm/st/l4/stm32l471.dtsi index 7e09a793836..f6fd79c129b 100644 --- a/dts/arm/st/l4/stm32l471.dtsi +++ b/dts/arm/st/l4/stm32l471.dtsi @@ -47,6 +47,15 @@ }; }; + usart3: serial@40004800 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40004800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>; + interrupts = <39 0>; + status = "disabled"; + label = "UART_3"; + }; + uart4: serial@40004c00 { compatible = "st,stm32-uart"; reg = <0x40004c00 0x400>; @@ -78,6 +87,17 @@ label= "I2C_2"; }; + spi2: spi@40003800 { + compatible = "st,stm32-spi-fifo"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40003800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>; + interrupts = <36 5>; + status = "disabled"; + label = "SPI_2"; + }; + spi3: spi@40003c00 { compatible = "st,stm32-spi-fifo"; #address-cells = <1>; diff --git a/dts/arm/st/l4/stm32l4r5.dtsi b/dts/arm/st/l4/stm32l4r5.dtsi index bbd37fe78f3..9b422e2f634 100644 --- a/dts/arm/st/l4/stm32l4r5.dtsi +++ b/dts/arm/st/l4/stm32l4r5.dtsi @@ -57,6 +57,15 @@ }; }; + usart3: serial@40004800 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40004800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>; + interrupts = <39 0>; + status = "disabled"; + label = "UART_3"; + }; + uart4: serial@40004c00 { compatible = "st,stm32-uart"; reg = <0x40004c00 0x400>; @@ -88,6 +97,17 @@ label= "I2C_4"; }; + spi2: spi@40003800 { + compatible = "st,stm32-spi-fifo"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40003800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>; + interrupts = <36 5>; + status = "disabled"; + label = "SPI_2"; + }; + spi3: spi@40003c00 { compatible = "st,stm32-spi-fifo"; #address-cells = <1>;