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soc: atmel: samx7x: refactor SoC support for the Atmel SAM E70/V71

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Refactor and merge the SoC support files for the Atmel SAM E70 and SAM V71
product series. These SoCs are part of a larger product family (SAM
E70/S70/V70/V71) and share a common set of peripherals.

Support for the two remaining product series (SAM S70/V70) is not part of
this refactoring as these will require further additions to the Atmel HAL.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This commit is contained in:
Henrik Brix Andersen 2025-01-13 20:58:46 +00:00 • committed by Benjamin Cabé
commit 7fec3d7f12
23 changed files with 114 additions and 435 deletions
Download patch file Download diff file Expand all files Collapse all files

2
drivers/counter/counter_sam_tc.c
View file

@ -74,7 +74,7 @@ struct counter_sam_dev_data {
}; };
static const uint32_t sam_tc_input_freq_table[] = { static const uint32_t sam_tc_input_freq_table[] = {
#if defined(CONFIG_SOC_SERIES_SAME70) || defined(CONFIG_SOC_SERIES_SAMV71) #if defined(CONFIG_SOC_SERIES_SAMX7X)
USEC_PER_SEC, USEC_PER_SEC,
SOC_ATMEL_SAM_MCK_FREQ_HZ / 8, SOC_ATMEL_SAM_MCK_FREQ_HZ / 8,
SOC_ATMEL_SAM_MCK_FREQ_HZ / 32, SOC_ATMEL_SAM_MCK_FREQ_HZ / 32,

5
drivers/dac/dac_sam.c
View file

@ -25,9 +25,8 @@
#include <zephyr/irq.h> #include <zephyr/irq.h>
LOG_MODULE_REGISTER(dac_sam, CONFIG_DAC_LOG_LEVEL); LOG_MODULE_REGISTER(dac_sam, CONFIG_DAC_LOG_LEVEL);
BUILD_ASSERT(IS_ENABLED(CONFIG_SOC_SERIES_SAME70) || BUILD_ASSERT(IS_ENABLED(CONFIG_SOC_SERIES_SAMX7X)
IS_ENABLED(CONFIG_SOC_SERIES_SAMV71), "Only SAMx7x series devices are currently supported.");
"Only SAME70, SAMV71 series devices are currently supported.");
#define DAC_CHANNEL_NO 2 #define DAC_CHANNEL_NO 2

3
drivers/ethernet/Kconfig.sam_gmac
View file

@ -27,8 +27,7 @@ DT_ETH_SAM_GMAC_NQ := $(dt_node_int_prop_int,$(DT_ETH_SAM_GMAC_PATH),num-queues)
config ETH_SAM_GMAC_QUEUES config ETH_SAM_GMAC_QUEUES
int "Number of active hardware TX and RX queues" int "Number of active hardware TX and RX queues"
default 1 default 1
range 1 $(DT_ETH_SAM_GMAC_NQ) if SOC_SERIES_SAME70 || \ range 1 $(DT_ETH_SAM_GMAC_NQ) if SOC_SERIES_SAMX7X || \
SOC_SERIES_SAMV71 || \
SOC_SERIES_SAM4E || \ SOC_SERIES_SAM4E || \
SOC_SERIES_SAME54 SOC_SERIES_SAME54
help help

12
drivers/gpio/gpio_sam.c
View file

@ -66,8 +66,7 @@ static int gpio_sam_port_configure(const struct device *dev, uint32_t mask,
pio->PIO_PUDR = mask; pio->PIO_PUDR = mask;
#if defined(CONFIG_SOC_SERIES_SAM4S) || \ #if defined(CONFIG_SOC_SERIES_SAM4S) || \
defined(CONFIG_SOC_SERIES_SAM4E) || \ defined(CONFIG_SOC_SERIES_SAM4E) || \
defined(CONFIG_SOC_SERIES_SAME70) || \ defined(CONFIG_SOC_SERIES_SAMX7X)
defined(CONFIG_SOC_SERIES_SAMV71)
/* Disable pull-down. */ /* Disable pull-down. */
pio->PIO_PPDDR = mask; pio->PIO_PPDDR = mask;
#endif #endif
@ -108,8 +107,7 @@ static int gpio_sam_port_configure(const struct device *dev, uint32_t mask,
pio->PIO_PUDR = mask; pio->PIO_PUDR = mask;
#if defined(CONFIG_SOC_SERIES_SAM4S) || \ #if defined(CONFIG_SOC_SERIES_SAM4S) || \
defined(CONFIG_SOC_SERIES_SAM4E) || \ defined(CONFIG_SOC_SERIES_SAM4E) || \
defined(CONFIG_SOC_SERIES_SAME70) || \ defined(CONFIG_SOC_SERIES_SAMX7X)
defined(CONFIG_SOC_SERIES_SAMV71)
pio->PIO_PPDDR = mask; pio->PIO_PPDDR = mask;
#endif #endif
if (flags & GPIO_PULL_UP) { if (flags & GPIO_PULL_UP) {
@ -117,8 +115,7 @@ static int gpio_sam_port_configure(const struct device *dev, uint32_t mask,
pio->PIO_PUER = mask; pio->PIO_PUER = mask;
#if defined(CONFIG_SOC_SERIES_SAM4S) || \ #if defined(CONFIG_SOC_SERIES_SAM4S) || \
defined(CONFIG_SOC_SERIES_SAM4E) || \ defined(CONFIG_SOC_SERIES_SAM4E) || \
defined(CONFIG_SOC_SERIES_SAME70) || \ defined(CONFIG_SOC_SERIES_SAMX7X)
defined(CONFIG_SOC_SERIES_SAMV71)
/* Setup Pull-down resistor. */ /* Setup Pull-down resistor. */
} else if (flags & GPIO_PULL_DOWN) { } else if (flags & GPIO_PULL_DOWN) {
@ -136,8 +133,7 @@ static int gpio_sam_port_configure(const struct device *dev, uint32_t mask,
} }
#elif defined(CONFIG_SOC_SERIES_SAM4S) || \ #elif defined(CONFIG_SOC_SERIES_SAM4S) || \
defined(CONFIG_SOC_SERIES_SAM4E) || \ defined(CONFIG_SOC_SERIES_SAM4E) || \
defined(CONFIG_SOC_SERIES_SAME70) || \ defined(CONFIG_SOC_SERIES_SAMX7X)
defined(CONFIG_SOC_SERIES_SAMV71)
/* Setup debounce. */ /* Setup debounce. */
if (flags & SAM_GPIO_DEBOUNCE) { if (flags & SAM_GPIO_DEBOUNCE) {

2
drivers/pwm/pwm_sam.c
View file

@ -25,7 +25,7 @@ LOG_MODULE_REGISTER(pwm_sam, CONFIG_PWM_LOG_LEVEL);
/* The SAMV71 HALs change the name of the field, so we need to /* The SAMV71 HALs change the name of the field, so we need to
* define it this way to match how the other SoC variants name it * define it this way to match how the other SoC variants name it
*/ */
#if defined(CONFIG_SOC_SERIES_SAMV71) #if defined(CONFIG_SOC_ATMEL_SAMV71) || defined(CONFIG_SOC_ATMEL_SAMV71_REVB)
#define PWM_CH_NUM PwmChNum #define PWM_CH_NUM PwmChNum
#endif #endif

4
soc/atmel/sam/common/Kconfig
View file

@ -38,7 +38,7 @@ config SOC_ATMEL_SAM_PLLA_MULA
int "PLL MULA" int "PLL MULA"
default 6 if SOC_SERIES_SAM3X default 6 if SOC_SERIES_SAM3X
default 9 if SOC_SERIES_SAM4S || SOC_SERIES_SAM4E default 9 if SOC_SERIES_SAM4S || SOC_SERIES_SAM4E
default 24 if SOC_SERIES_SAME70 || SOC_SERIES_SAMV71 default 24 if SOC_SERIES_SAMX7X
range 1 62 range 1 62
help help
This is the multiplier (MULA) used by the PLL. This is the multiplier (MULA) used by the PLL.
@ -65,7 +65,7 @@ config SOC_ATMEL_SAM_PLLA_DIVA
config SOC_ATMEL_SAM_MDIV config SOC_ATMEL_SAM_MDIV
int "MDIV" int "MDIV"
depends on SOC_SERIES_SAME70 || SOC_SERIES_SAMV71 depends on SOC_SERIES_SAMX7X
default 2 default 2
range 1 4 range 1 4
help help

4
soc/atmel/sam/common/soc_pmc.h
View file

@ -119,7 +119,7 @@ static ALWAYS_INLINE void soc_pmc_mck_set_prescaler(uint32_t prescaler)
} }
} }
#if defined(CONFIG_SOC_SERIES_SAME70) || defined(CONFIG_SOC_SERIES_SAMV71) #ifdef CONFIG_SOC_SERIES_SAMX7X
/** /**
* @brief Set the divider of the Master clock. * @brief Set the divider of the Master clock.
@ -155,7 +155,7 @@ static ALWAYS_INLINE void soc_pmc_mck_set_divider(uint32_t divider)
} }
} }
#endif /* CONFIG_SOC_SERIES_SAME70 || CONFIG_SOC_SERIES_SAMV71 */ #endif /* CONFIG_SOC_SERIES_SAMX7X */
/** /**
* @brief Set the source of the Master clock. * @brief Set the source of the Master clock.

20
soc/atmel/sam/same70/Kconfig
View file

@ -1,20 +0,0 @@
# Atmel SAM E70 MCU series
# Copyright (c) 2016 Piotr Mienkowski
# Copyright (c) 2023-2024 Gerson Fernando Budke <nandojve@gmail.com>
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_SAME70
select ARM
select CPU_CORTEX_M7
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_ARM_MPU
select CPU_HAS_FPU_DOUBLE_PRECISION
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select INIT_ARCH_HW_AT_BOOT
select SOC_RESET_HOOK
select HAS_SWO
select XIP
select HAS_POWEROFF
select SOC_EARLY_INIT_HOOK

13
soc/atmel/sam/same70/Kconfig.defconfig
View file

@ -1,13 +0,0 @@
# Atmel SAM E70 MCU series configuration options
# Copyright (c) 2016 Piotr Mienkowski
# Copyright (c) 2023-2024 Gerson Fernando Budke <nandojve@gmail.com>
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_SAME70
config NUM_IRQS
default 74 if SOC_ATMEL_SAME70_REVB
default 71
endif # SOC_SERIES_SAME70

60
soc/atmel/sam/same70/soc_config.c
View file

@ -1,60 +0,0 @@
/*
* Copyright (c) 2016 Piotr Mienkowski
* Copyright (c) 2024 Gerson Fernando Budke <nandojve@gmail.com>
* SPDX-License-Identifier: Apache-2.0
*/
/** @file
* @brief System module to support early Atmel SAM E70 MCU configuration
*/
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <soc.h>
#include <zephyr/arch/cpu.h>
/**
* @brief Perform SoC configuration at boot.
*
* This should be run early during the boot process but after basic hardware
* initialization is done.
*/
void atmel_same70_config(void)
{
if (IS_ENABLED(CONFIG_SOC_ATMEL_SAM_DISABLE_ERASE_PIN)) {
/* Disable ERASE function on PB12 pin, this is controlled
* by Bus Matrix
*/
MATRIX->CCFG_SYSIO |= CCFG_SYSIO_SYSIO12;
}
/* In Cortex-M based SoCs JTAG interface can be used to perform
* IEEE1149.1 JTAG Boundary scan only. It can not be used as a debug
* interface therefore there is no harm done by disabling the JTAG TDI
* pin by default.
*/
/* Disable TDI function on PB4 pin, this is controlled by Bus Matrix */
MATRIX->CCFG_SYSIO |= CCFG_SYSIO_SYSIO4;
if (IS_ENABLED(CONFIG_LOG_BACKEND_SWO)) {
/* Disable PCK3 clock used by ETM module */
PMC->PMC_SCDR = PMC_SCDR_PCK3;
while ((PMC->PMC_SCSR) & PMC_SCSR_PCK3) {
;
}
/* Select PLLA clock as PCK3 clock */
PMC->PMC_PCK[3] = PMC_MCKR_CSS_PLLA_CLK;
/* Enable PCK3 clock */
PMC->PMC_SCER = PMC_SCER_PCK3;
/* Wait for PCK3 setup to complete */
while (!((PMC->PMC_SR) & PMC_SR_PCKRDY3)) {
;
}
/* Enable TDO/TRACESWO function on PB5 pin */
MATRIX->CCFG_SYSIO &= ~CCFG_SYSIO_SYSIO5;
} else {
/* Disable TDO/TRACESWO function on PB5 pin */
MATRIX->CCFG_SYSIO |= CCFG_SYSIO_SYSIO5;
}
}

11
soc/atmel/sam/samv71/CMakeLists.txt
View file

@ -1,11 +0,0 @@
# Copyright (c) 2024 Gerson Fernando Budke <nandojve@gmail.com>
# SPDX-License-Identifier: Apache-2.0
zephyr_include_directories(.)
zephyr_sources(
soc.c
soc_config.c
)
set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")

149
soc/atmel/sam/samv71/soc.c
View file

@ -1,149 +0,0 @@
/*
* Copyright (c) 2016 Piotr Mienkowski
* Copyright (c) 2019-2023 Gerson Fernando Budke <nandojve@gmail.com>
* SPDX-License-Identifier: Apache-2.0
*/
/** @file
* @brief Atmel SAM V71 MCU initialization code
*
* This file provides routines to initialize and support board-level hardware
* for the Atmel SAM V71 MCU.
*/
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/cache.h>
#include <zephyr/arch/cache.h>
#include <soc.h>
#include <cmsis_core.h>
#include <zephyr/logging/log.h>
#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
LOG_MODULE_REGISTER(soc);
/**
* @brief Setup various clocks on SoC at boot time.
*
* Setup Slow, Main, PLLA, Processor and Master clocks during the device boot.
* It is assumed that the relevant registers are at their reset value.
*/
static ALWAYS_INLINE void clock_init(void)
{
/* Switch the main clock to the internal OSC with 12MHz */
soc_pmc_switch_mainck_to_fastrc(SOC_PMC_FAST_RC_FREQ_12MHZ);
/* Switch MCK (Master Clock) to the main clock */
soc_pmc_mck_set_source(SOC_PMC_MCK_SRC_MAIN_CLK);
EFC->EEFC_FMR = EEFC_FMR_FWS(0) | EEFC_FMR_CLOE;
soc_pmc_enable_clock_failure_detector();
if (IS_ENABLED(CONFIG_SOC_ATMEL_SAM_EXT_SLCK)) {
soc_supc_slow_clock_select_crystal_osc();
}
if (IS_ENABLED(CONFIG_SOC_ATMEL_SAM_EXT_MAINCK)) {
/*
* Setup main external crystal oscillator.
*/
/* We select maximum setup time.
* While start up time could be shortened
* this optimization is not deemed
* critical now.
*/
soc_pmc_switch_mainck_to_xtal(false, 0xff);
}
/*
* Set FWS (Flash Wait State) value before increasing Master Clock
* (MCK) frequency.
* TODO: set FWS based on the actual MCK frequency and VDDIO value
* rather than maximum supported 150 MHz at standard VDDIO=2.7V
*/
EFC->EEFC_FMR = EEFC_FMR_FWS(5) | EEFC_FMR_CLOE;
/*
* Setup PLLA
*/
/*
* PLL clock = Main * (MULA + 1) / DIVA
*
* By default, MULA == 24, DIVA == 1.
* With main crystal running at 12 MHz,
* PLL = 12 * (24 + 1) / 1 = 300 MHz
*
* With Processor Clock prescaler at 1
* Processor Clock (HCLK)=300 MHz.
*/
soc_pmc_enable_pllack(CONFIG_SOC_ATMEL_SAM_PLLA_MULA, 0x3Fu,
CONFIG_SOC_ATMEL_SAM_PLLA_DIVA);
soc_pmc_enable_upllck(0x3Fu);
/*
* Final setup of the Master Clock
*/
/* Setting PLLA as MCK, first prescaler, then divider and source last */
soc_pmc_mck_set_prescaler(1);
soc_pmc_mck_set_divider(CONFIG_SOC_ATMEL_SAM_MDIV);
soc_pmc_mck_set_source(SOC_PMC_MCK_SRC_PLLA_CLK);
/* Disable internal fast RC if we have an external crystal oscillator */
if (IS_ENABLED(CONFIG_SOC_ATMEL_SAM_EXT_MAINCK)) {
soc_pmc_osc_disable_fastrc();
}
}
void soc_reset_hook(void)
{
if (IS_ENABLED(CONFIG_SOC_ATMEL_SAM_WAIT_MODE)) {
/*
* Instruct CPU to enter Wait mode instead of Sleep mode to
* keep Processor Clock (HCLK) and thus be able to debug
* CPU using JTAG.
*/
soc_pmc_enable_waitmode();
}
/*
* DTCM is enabled by default at reset, therefore we have to disable
* it first to get the caches into a state where then the
* sys_cache*-functions can enable them, if requested by the
* configuration.
*/
SCB_InvalidateDCache();
SCB_DisableDCache();
/*
* Enable the caches only if configured to do so.
*/
sys_cache_instr_enable();
sys_cache_data_enable();
/* Setup system clocks */
clock_init();
}
extern void atmel_samv71_config(void);
/**
* @brief Perform basic hardware initialization at boot.
*
* This needs to be run at the very beginning.
*/
void soc_early_init_hook(void)
{
/* Check that the CHIP CIDR matches the HAL one */
if (CHIPID->CHIPID_CIDR != CHIP_CIDR) {
LOG_WRN("CIDR mismatch: chip = 0x%08x vs HAL = 0x%08x",
(uint32_t)CHIPID->CHIPID_CIDR, (uint32_t)CHIP_CIDR);
}
atmel_samv71_config();
}

82
soc/atmel/sam/samv71/soc.h
View file

@ -1,82 +0,0 @@
/*
* Copyright (c) 2016 Piotr Mienkowski
* Copyright (c) 2019-2024 Gerson Fernando Budke <nandojve@gmail.com>
* SPDX-License-Identifier: Apache-2.0
*/
/** @file
* @brief Register access macros for the Atmel SAM V71 MCU.
*
* This file provides register access macros for the Atmel SAM V71 MCU, HAL
* drivers for core peripherals as well as symbols specific to Atmel SAM family.
*/
#ifndef _SOC_ATMEL_SAM_SAMV71_SOC_H_
#define _SOC_ATMEL_SAM_SAMV71_SOC_H_
#include <zephyr/sys/util.h>
#ifndef _ASMLANGUAGE
#define DONT_USE_CMSIS_INIT
#define DONT_USE_PREDEFINED_CORE_HANDLERS
#define DONT_USE_PREDEFINED_PERIPHERALS_HANDLERS
#if defined(CONFIG_SOC_SAMV71J19)
#include <samv71j19.h>
#elif defined(CONFIG_SOC_SAMV71J20)
#include <samv71j20.h>
#elif defined(CONFIG_SOC_SAMV71J21)
#include <samv71j21.h>
#elif defined(CONFIG_SOC_SAMV71N19)
#include <samv71n19.h>
#elif defined(CONFIG_SOC_SAMV71N20)
#include <samv71n20.h>
#elif defined(CONFIG_SOC_SAMV71N21)
#include <samv71n21.h>
#elif defined(CONFIG_SOC_SAMV71Q19)
#include <samv71q19.h>
#elif defined(CONFIG_SOC_SAMV71Q20)
#include <samv71q20.h>
#elif defined(CONFIG_SOC_SAMV71Q21)
#include <samv71q21.h>
#elif defined(CONFIG_SOC_SAMV71J19B)
#include <samv71j19b.h>
#elif defined(CONFIG_SOC_SAMV71J20B)
#include <samv71j20b.h>
#elif defined(CONFIG_SOC_SAMV71J21B)
#include <samv71j21b.h>
#elif defined(CONFIG_SOC_SAMV71N19B)
#include <samv71n19b.h>
#elif defined(CONFIG_SOC_SAMV71N20B)
#include <samv71n20b.h>
#elif defined(CONFIG_SOC_SAMV71N21B)
#include <samv71n21b.h>
#elif defined(CONFIG_SOC_SAMV71Q19B)
#include <samv71q19b.h>
#elif defined(CONFIG_SOC_SAMV71Q20B)
#include <samv71q20b.h>
#elif defined(CONFIG_SOC_SAMV71Q21B)
#include <samv71q21b.h>
#else
#error Library does not support the specified device.
#endif
#include "../common/soc_pmc.h"
#include "../common/soc_gpio.h"
#include "../common/soc_supc.h"
#include "../common/atmel_sam_dt.h"
/** Processor Clock (HCLK) Frequency */
#define SOC_ATMEL_SAM_HCLK_FREQ_HZ ATMEL_SAM_DT_CPU_CLK_FREQ_HZ
/** Master Clock (MCK) Frequency */
#define SOC_ATMEL_SAM_MCK_FREQ_HZ \
(SOC_ATMEL_SAM_HCLK_FREQ_HZ / CONFIG_SOC_ATMEL_SAM_MDIV)
/** UTMI PLL clock (UPLLCK) Frequency */
#define SOC_ATMEL_SAM_UPLLCK_FREQ_HZ MHZ(480)
#endif /* _ASMLANGUAGE */
#endif /* _SOC_ATMEL_SAM_SAMV71_SOC_H_ */

0
soc/atmel/sam/same70/CMakeLists.txt → soc/atmel/sam/samx7x/CMakeLists.txt
View file

4
soc/atmel/sam/samv71/Kconfig → soc/atmel/sam/samx7x/Kconfig
View file

@ -1,10 +1,10 @@
# Atmel SAM V71 MCU series # Atmel SAM E70/S70/V70/V71 MCU series
# Copyright (c) 2016 Piotr Mienkowski # Copyright (c) 2016 Piotr Mienkowski
# Copyright (c) 2019-2024 Gerson Fernando Budke <nandojve@gmail.com> # Copyright (c) 2019-2024 Gerson Fernando Budke <nandojve@gmail.com>
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_SAMV71 config SOC_SERIES_SAMX7X
select ARM select ARM
select CPU_CORTEX_M7 select CPU_CORTEX_M7
select CPU_CORTEX_M_HAS_DWT select CPU_CORTEX_M_HAS_DWT

7
soc/atmel/sam/samv71/Kconfig.defconfig → soc/atmel/sam/samx7x/Kconfig.defconfig
View file

@ -1,13 +1,14 @@
# Atmel SAM V71 MCU series configuration options # Atmel SAM E70/S70/V70/V71 MCU series configuration options
# Copyright (c) 2016 Piotr Mienkowski # Copyright (c) 2016 Piotr Mienkowski
# Copyright (c) 2019-2024 Gerson Fernando Budke <nandojve@gmail.com> # Copyright (c) 2019-2024 Gerson Fernando Budke <nandojve@gmail.com>
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_SAMV71 if SOC_SERIES_SAMX7X
config NUM_IRQS config NUM_IRQS
default 74 if SOC_ATMEL_SAME70_REVB
default 74 if SOC_ATMEL_SAMV71_REVB default 74 if SOC_ATMEL_SAMV71_REVB
default 71 default 71
endif # SOC_SERIES_SAMV71 endif # SOC_SERIES_SAMX7X

17
soc/atmel/sam/samx7x/Kconfig.soc Normal file
View file

@ -0,0 +1,17 @@
# Atmel SAM E70/S70/V70/V71 MCU series
# Copyright (c) 2016 Piotr Mienkowski
# Copyright (c) 2019-2024 Gerson Fernando Budke <nandojve@gmail.com>
# Copyright (c) 2024 Henrik Brix Andersen <henrik@brixandersen.dk>
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_SAMX7X
bool
select SOC_FAMILY_ATMEL_SAM
help
Enable support for Atmel SAM E70/S70/V70/V71 ARM Cortex-M7 Microcontrollers.
config SOC_SERIES
default "samx7x" if SOC_SERIES_SAMX7X
rsource "Kconfig.soc.sam*"

42
soc/atmel/sam/same70/Kconfig.soc → soc/atmel/sam/samx7x/Kconfig.soc.same70
View file

@ -2,103 +2,87 @@
# Copyright (c) 2016 Piotr Mienkowski # Copyright (c) 2016 Piotr Mienkowski
# Copyright (c) 2024 Gerson Fernando Budke <nandojve@gmail.com> # Copyright (c) 2024 Gerson Fernando Budke <nandojve@gmail.com>
# Copyright (c) 2024 Henrik Brix Andersen <henrik@brixandersen.dk>
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_SAME70 config SOC_ATMEL_SAME70
select SOC_SERIES_SAMX7X
bool bool
select SOC_FAMILY_ATMEL_SAM
help
Enable support for Atmel SAM E70 ARM Cortex-M7 Microcontrollers.
Part No.: SAME70J19, SAME70J20, SAME70J21, SAME70N19, SAME70N20,
SAME70N21, SAME70Q19, SAME70Q20, SAME70Q21, SAME70J19B, SAME70J20B,
SAME70J21B, SAME70N19B, SAME70N20B, SAME70N21B, SAME70Q19B,
SAME70Q20B, SAME70Q21B
config SOC_ATMEL_SAME70_REVB config SOC_ATMEL_SAME70_REVB
select SOC_SERIES_SAMX7X
bool bool
config SOC_SERIES
default "same70" if SOC_SERIES_SAME70
config SOC_SAME70J19 config SOC_SAME70J19
bool bool
select SOC_SERIES_SAME70 select SOC_ATMEL_SAME70
config SOC_SAME70J20 config SOC_SAME70J20
bool bool
select SOC_SERIES_SAME70 select SOC_ATMEL_SAME70
config SOC_SAME70J21 config SOC_SAME70J21
bool bool
select SOC_SERIES_SAME70 select SOC_ATMEL_SAME70
config SOC_SAME70N19 config SOC_SAME70N19
bool bool
select SOC_SERIES_SAME70 select SOC_ATMEL_SAME70
config SOC_SAME70N20 config SOC_SAME70N20
bool bool
select SOC_SERIES_SAME70 select SOC_ATMEL_SAME70
config SOC_SAME70N21 config SOC_SAME70N21
bool bool
select SOC_SERIES_SAME70 select SOC_ATMEL_SAME70
config SOC_SAME70Q19 config SOC_SAME70Q19
bool bool
select SOC_SERIES_SAME70 select SOC_ATMEL_SAME70
config SOC_SAME70Q20 config SOC_SAME70Q20
bool bool
select SOC_SERIES_SAME70 select SOC_ATMEL_SAME70
config SOC_SAME70Q21 config SOC_SAME70Q21
bool bool
select SOC_SERIES_SAME70 select SOC_ATMEL_SAME70
config SOC_SAME70J19B config SOC_SAME70J19B
bool bool
select SOC_SERIES_SAME70
select SOC_ATMEL_SAME70_REVB select SOC_ATMEL_SAME70_REVB
config SOC_SAME70J20B config SOC_SAME70J20B
bool bool
select SOC_SERIES_SAME70
select SOC_ATMEL_SAME70_REVB select SOC_ATMEL_SAME70_REVB
config SOC_SAME70J21B config SOC_SAME70J21B
bool bool
select SOC_SERIES_SAME70
select SOC_ATMEL_SAME70_REVB select SOC_ATMEL_SAME70_REVB
config SOC_SAME70N19B config SOC_SAME70N19B
bool bool
select SOC_SERIES_SAME70
select SOC_ATMEL_SAME70_REVB select SOC_ATMEL_SAME70_REVB
config SOC_SAME70N20B config SOC_SAME70N20B
bool bool
select SOC_SERIES_SAME70
select SOC_ATMEL_SAME70_REVB select SOC_ATMEL_SAME70_REVB
config SOC_SAME70N21B config SOC_SAME70N21B
bool bool
select SOC_SERIES_SAME70
select SOC_ATMEL_SAME70_REVB select SOC_ATMEL_SAME70_REVB
config SOC_SAME70Q19B config SOC_SAME70Q19B
bool bool
select SOC_SERIES_SAME70
select SOC_ATMEL_SAME70_REVB select SOC_ATMEL_SAME70_REVB
config SOC_SAME70Q20B config SOC_SAME70Q20B
bool bool
select SOC_SERIES_SAME70
select SOC_ATMEL_SAME70_REVB select SOC_ATMEL_SAME70_REVB
config SOC_SAME70Q21B config SOC_SAME70Q21B
bool bool
select SOC_SERIES_SAME70
select SOC_ATMEL_SAME70_REVB select SOC_ATMEL_SAME70_REVB
config SOC config SOC

42
soc/atmel/sam/samv71/Kconfig.soc → soc/atmel/sam/samx7x/Kconfig.soc.samv71
View file

@ -2,103 +2,87 @@
# Copyright (c) 2016 Piotr Mienkowski # Copyright (c) 2016 Piotr Mienkowski
# Copyright (c) 2019-2024 Gerson Fernando Budke <nandojve@gmail.com> # Copyright (c) 2019-2024 Gerson Fernando Budke <nandojve@gmail.com>
# Copyright (c) 2024 Henrik Brix Andersen <henrik@brixandersen.dk>
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_SAMV71 config SOC_ATMEL_SAMV71
bool bool
select SOC_FAMILY_ATMEL_SAM select SOC_SERIES_SAMX7X
help
Enable support for Atmel SAM V71 ARM Cortex-M7 Microcontrollers.
Part No.: SAMV71J19, SAMV71J20, SAMV71J21, SAMV71N19, SAMV71N20,
SAMV71N21, SAMV71Q19, SAMV71Q20, SAMV71Q21, SAMV71J19B, SAMV71J20B,
SAMV71J21B, SAMV71N19B, SAMV71N20B, SAMV71N21B, SAMV71Q19B,
SAMV71Q20B, SAMV71Q21B
config SOC_ATMEL_SAMV71_REVB config SOC_ATMEL_SAMV71_REVB
bool bool
select SOC_SERIES_SAMX7X
config SOC_SERIES
default "samv71" if SOC_SERIES_SAMV71
config SOC_SAMV71J19 config SOC_SAMV71J19
bool bool
select SOC_SERIES_SAMV71 select SOC_ATMEL_SAMV71
config SOC_SAMV71J20 config SOC_SAMV71J20
bool bool
select SOC_SERIES_SAMV71 select SOC_ATMEL_SAMV71
config SOC_SAMV71J21 config SOC_SAMV71J21
bool bool
select SOC_SERIES_SAMV71 select SOC_ATMEL_SAMV71
config SOC_SAMV71N19 config SOC_SAMV71N19
bool bool
select SOC_SERIES_SAMV71 select SOC_ATMEL_SAMV71
config SOC_SAMV71N20 config SOC_SAMV71N20
bool bool
select SOC_SERIES_SAMV71 select SOC_ATMEL_SAMV71
config SOC_SAMV71N21 config SOC_SAMV71N21
bool bool
select SOC_SERIES_SAMV71 select SOC_ATMEL_SAMV71
config SOC_SAMV71Q19 config SOC_SAMV71Q19
bool bool
select SOC_SERIES_SAMV71 select SOC_ATMEL_SAMV71
config SOC_SAMV71Q20 config SOC_SAMV71Q20
bool bool
select SOC_SERIES_SAMV71 select SOC_ATMEL_SAMV71
config SOC_SAMV71Q21 config SOC_SAMV71Q21
bool bool
select SOC_SERIES_SAMV71 select SOC_ATMEL_SAMV71
config SOC_SAMV71J19B config SOC_SAMV71J19B
bool bool
select SOC_SERIES_SAMV71
select SOC_ATMEL_SAMV71_REVB select SOC_ATMEL_SAMV71_REVB
config SOC_SAMV71J20B config SOC_SAMV71J20B
bool bool
select SOC_SERIES_SAMV71
select SOC_ATMEL_SAMV71_REVB select SOC_ATMEL_SAMV71_REVB
config SOC_SAMV71J21B config SOC_SAMV71J21B
bool bool
select SOC_SERIES_SAMV71
select SOC_ATMEL_SAMV71_REVB select SOC_ATMEL_SAMV71_REVB
config SOC_SAMV71N19B config SOC_SAMV71N19B
bool bool
select SOC_SERIES_SAMV71
select SOC_ATMEL_SAMV71_REVB select SOC_ATMEL_SAMV71_REVB
config SOC_SAMV71N20B config SOC_SAMV71N20B
bool bool
select SOC_SERIES_SAMV71
select SOC_ATMEL_SAMV71_REVB select SOC_ATMEL_SAMV71_REVB
config SOC_SAMV71N21B config SOC_SAMV71N21B
bool bool
select SOC_SERIES_SAMV71
select SOC_ATMEL_SAMV71_REVB select SOC_ATMEL_SAMV71_REVB
config SOC_SAMV71Q19B config SOC_SAMV71Q19B
bool bool
select SOC_SERIES_SAMV71
select SOC_ATMEL_SAMV71_REVB select SOC_ATMEL_SAMV71_REVB
config SOC_SAMV71Q20B config SOC_SAMV71Q20B
bool bool
select SOC_SERIES_SAMV71
select SOC_ATMEL_SAMV71_REVB select SOC_ATMEL_SAMV71_REVB
config SOC_SAMV71Q21B config SOC_SAMV71Q21B
bool bool
select SOC_SERIES_SAMV71
select SOC_ATMEL_SAMV71_REVB select SOC_ATMEL_SAMV71_REVB
config SOC config SOC

14
soc/atmel/sam/same70/soc.c → soc/atmel/sam/samx7x/soc.c
View file

@ -1,14 +1,14 @@
/* /*
* Copyright (c) 2016 Piotr Mienkowski * Copyright (c) 2016 Piotr Mienkowski
* Copyright (c) 2023-2024 Gerson Fernando Budke <nandojve@gmail.com> * Copyright (c) 2019-2024 Gerson Fernando Budke <nandojve@gmail.com>
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
/** @file /** @file
* @brief Atmel SAM E70 MCU initialization code * @brief Atmel SAM E70/S70/V70/V71 MCU series initialization code
* *
* This file provides routines to initialize and support board-level hardware * This file provides routines to initialize and support board-level hardware
* for the Atmel SAM E70 MCU. * for the Atmel SAM E70/S70/V70/V71 MCU series.
*/ */
#include <zephyr/kernel.h> #include <zephyr/kernel.h>
@ -47,7 +47,6 @@ static ALWAYS_INLINE void clock_init(void)
soc_supc_slow_clock_select_crystal_osc(); soc_supc_slow_clock_select_crystal_osc();
} }
if (IS_ENABLED(CONFIG_SOC_ATMEL_SAM_EXT_MAINCK)) { if (IS_ENABLED(CONFIG_SOC_ATMEL_SAM_EXT_MAINCK)) {
/* /*
* Setup main external crystal oscillator. * Setup main external crystal oscillator.
@ -86,7 +85,6 @@ static ALWAYS_INLINE void clock_init(void)
soc_pmc_enable_pllack(CONFIG_SOC_ATMEL_SAM_PLLA_MULA, 0x3Fu, soc_pmc_enable_pllack(CONFIG_SOC_ATMEL_SAM_PLLA_MULA, 0x3Fu,
CONFIG_SOC_ATMEL_SAM_PLLA_DIVA); CONFIG_SOC_ATMEL_SAM_PLLA_DIVA);
soc_pmc_enable_upllck(0x3Fu); soc_pmc_enable_upllck(0x3Fu);
/* /*
@ -98,7 +96,6 @@ static ALWAYS_INLINE void clock_init(void)
soc_pmc_mck_set_divider(CONFIG_SOC_ATMEL_SAM_MDIV); soc_pmc_mck_set_divider(CONFIG_SOC_ATMEL_SAM_MDIV);
soc_pmc_mck_set_source(SOC_PMC_MCK_SRC_PLLA_CLK); soc_pmc_mck_set_source(SOC_PMC_MCK_SRC_PLLA_CLK);
/* Disable internal fast RC if we have an external crystal oscillator */ /* Disable internal fast RC if we have an external crystal oscillator */
if (IS_ENABLED(CONFIG_SOC_ATMEL_SAM_EXT_MAINCK)) { if (IS_ENABLED(CONFIG_SOC_ATMEL_SAM_EXT_MAINCK)) {
soc_pmc_osc_disable_fastrc(); soc_pmc_osc_disable_fastrc();
@ -135,7 +132,7 @@ void soc_reset_hook(void)
clock_init(); clock_init();
} }
extern void atmel_same70_config(void); extern void atmel_samx7x_config(void);
/** /**
* @brief Perform basic hardware initialization at boot. * @brief Perform basic hardware initialization at boot.
* *
@ -148,5 +145,6 @@ void soc_early_init_hook(void)
LOG_WRN("CIDR mismatch: chip = 0x%08x vs HAL = 0x%08x", LOG_WRN("CIDR mismatch: chip = 0x%08x vs HAL = 0x%08x",
(uint32_t)CHIPID->CHIPID_CIDR, (uint32_t)CHIP_CIDR); (uint32_t)CHIPID->CHIPID_CIDR, (uint32_t)CHIP_CIDR);
} }
atmel_same70_config();
atmel_samx7x_config();
} }

50
soc/atmel/sam/same70/soc.h → soc/atmel/sam/samx7x/soc.h
View file

@ -1,18 +1,18 @@
/* /*
* Copyright (c) 2016 Piotr Mienkowski * Copyright (c) 2016 Piotr Mienkowski
* Copyright (c) 2024 Gerson Fernando Budke <nandojve@gmail.com> * Copyright (c) 2019-2024 Gerson Fernando Budke <nandojve@gmail.com>
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
/** @file /** @file
* @brief Register access macros for the Atmel SAM E70 MCU. * @brief Register access macros for the Atmel SAM E70/S70/V70/V71 MCU series.
* *
* This file provides register access macros for the Atmel SAM E70 MCU, HAL * This file provides register access macros for the Atmel SAM E70/S70/V70/V71 MCU series, HAL
* drivers for core peripherals as well as symbols specific to Atmel SAM family. * drivers for core peripherals as well as symbols specific to this Atmel SAM family.
*/ */
#ifndef _SOC_ATMEL_SAM_SAME70_SOC_H_ #ifndef _SOC_ATMEL_SAM_SAMX7X_SOC_H_
#define _SOC_ATMEL_SAM_SAME70_SOC_H_ #define _SOC_ATMEL_SAM_SAMX7X_SOC_H_
#include <zephyr/sys/util.h> #include <zephyr/sys/util.h>
@ -58,6 +58,42 @@
#include <same70q20b.h> #include <same70q20b.h>
#elif defined(CONFIG_SOC_SAME70Q21B) #elif defined(CONFIG_SOC_SAME70Q21B)
#include <same70q21b.h> #include <same70q21b.h>
#elif defined(CONFIG_SOC_SAMV71J19)
#include <samv71j19.h>
#elif defined(CONFIG_SOC_SAMV71J20)
#include <samv71j20.h>
#elif defined(CONFIG_SOC_SAMV71J21)
#include <samv71j21.h>
#elif defined(CONFIG_SOC_SAMV71N19)
#include <samv71n19.h>
#elif defined(CONFIG_SOC_SAMV71N20)
#include <samv71n20.h>
#elif defined(CONFIG_SOC_SAMV71N21)
#include <samv71n21.h>
#elif defined(CONFIG_SOC_SAMV71Q19)
#include <samv71q19.h>
#elif defined(CONFIG_SOC_SAMV71Q20)
#include <samv71q20.h>
#elif defined(CONFIG_SOC_SAMV71Q21)
#include <samv71q21.h>
#elif defined(CONFIG_SOC_SAMV71J19B)
#include <samv71j19b.h>
#elif defined(CONFIG_SOC_SAMV71J20B)
#include <samv71j20b.h>
#elif defined(CONFIG_SOC_SAMV71J21B)
#include <samv71j21b.h>
#elif defined(CONFIG_SOC_SAMV71N19B)
#include <samv71n19b.h>
#elif defined(CONFIG_SOC_SAMV71N20B)
#include <samv71n20b.h>
#elif defined(CONFIG_SOC_SAMV71N21B)
#include <samv71n21b.h>
#elif defined(CONFIG_SOC_SAMV71Q19B)
#include <samv71q19b.h>
#elif defined(CONFIG_SOC_SAMV71Q20B)
#include <samv71q20b.h>
#elif defined(CONFIG_SOC_SAMV71Q21B)
#include <samv71q21b.h>
#else #else
#error Library does not support the specified device. #error Library does not support the specified device.
#endif #endif
@ -79,4 +115,4 @@
#endif /* _ASMLANGUAGE */ #endif /* _ASMLANGUAGE */
#endif /* _SOC_ATMEL_SAM_SAME70_SOC_H_ */ #endif /* _SOC_ATMEL_SAM_SAMX7X_SOC_H_ */

4
soc/atmel/sam/samv71/soc_config.c → soc/atmel/sam/samx7x/soc_config.c
View file

@ -5,7 +5,7 @@
*/ */
/** @file /** @file
* @brief System module to support early Atmel SAM V71 MCU configuration * @brief System module to support early Atmel SAM E70/S70/V70/V71 MCU series configuration
*/ */
#include <zephyr/device.h> #include <zephyr/device.h>
@ -19,7 +19,7 @@
* This should be run early during the boot process but after basic hardware * This should be run early during the boot process but after basic hardware
* initialization is done. * initialization is done.
*/ */
void atmel_samv71_config(void) void atmel_samx7x_config(void)
{ {
if (IS_ENABLED(CONFIG_SOC_ATMEL_SAM_DISABLE_ERASE_PIN)) { if (IS_ENABLED(CONFIG_SOC_ATMEL_SAM_DISABLE_ERASE_PIN)) {
/* Disable ERASE function on PB12 pin, this is controlled /* Disable ERASE function on PB12 pin, this is controlled

2
west.yml
View file

@ -157,7 +157,7 @@ manifest:
groups: groups:
- hal - hal
- name: hal_atmel - name: hal_atmel
revision: d37df06556f7c03ff3a20422475077fafa0dc17c revision: dde7a36d00bd5dafd1ffcd8d243dfbceeb20e856
path: modules/hal/atmel path: modules/hal/atmel
groups: groups:
- hal - hal