From 7f6fcf2198352091256801a71411a20602e4999c Mon Sep 17 00:00:00 2001 From: Michael Scott Date: Fri, 16 Nov 2018 14:28:29 -0800 Subject: [PATCH] dts-binding: modem: wnc-14a2a: remove base_label to fix build errors When the WNC-14A2A modem binding was originally introduced, I thought the base_label would shorten the define keeping the result short and easily portable. Turns out with the latest changes, it has a side effect of removing the "DT_*" prefix which is breaking the build. Let's remove "base_label" from the modem binding and adjust all of the dts_fixups referring to the WNC14A2A defines. NOTE: This commit moves the left-over WNC14A2A dts_fixup defines from the nRF52 soc into samples/net/lwm2m_client as the new values. They will stay there until the modem can be re-configured as a shield. Signed-off-by: Michael Scott --- dts/bindings/modem/wnc,m14a2a.yaml | 2 -- samples/net/lwm2m_client/dts_fixup.h | 46 +++++++++++++++++++--------- soc/arm/nordic_nrf/nrf52/dts_fixup.h | 16 ---------- 3 files changed, 32 insertions(+), 32 deletions(-) diff --git a/dts/bindings/modem/wnc,m14a2a.yaml b/dts/bindings/modem/wnc,m14a2a.yaml index 2c3b1704920..959e30a091c 100644 --- a/dts/bindings/modem/wnc,m14a2a.yaml +++ b/dts/bindings/modem/wnc,m14a2a.yaml @@ -50,6 +50,4 @@ properties: category: optional description: UART RTS pin if no HW flow control (set to always enabled) generation: define, use-prop-name - -base_label: WNCM14A2A ... diff --git a/samples/net/lwm2m_client/dts_fixup.h b/samples/net/lwm2m_client/dts_fixup.h index f1d35ca4e44..65b1b5cec07 100644 --- a/samples/net/lwm2m_client/dts_fixup.h +++ b/samples/net/lwm2m_client/dts_fixup.h @@ -5,19 +5,37 @@ */ #ifdef CONFIG_BOARD_FRDM_K64F -#define DT_WNCM14A2A_UART_DRV_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_BUS_NAME -#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER -#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN -#define DT_WNCM14A2A_GPIO_MDM_POWER_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_POWER_GPIOS_CONTROLLER -#define DT_WNCM14A2A_GPIO_MDM_POWER_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_POWER_GPIOS_PIN -#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_CONTROLLER -#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_PIN -#define DT_WNCM14A2A_GPIO_MDM_RESET_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_RESET_GPIOS_CONTROLLER -#define DT_WNCM14A2A_GPIO_MDM_RESET_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_RESET_GPIOS_PIN -#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_CONTROLLER -#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_PIN -#ifdef DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN -#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_CONTROLLER -#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN +#define DT_WNCM14A2A_UART_DRV_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_BUS_NAME +#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER +#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN +#define DT_WNCM14A2A_GPIO_MDM_POWER_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_POWER_GPIOS_CONTROLLER +#define DT_WNCM14A2A_GPIO_MDM_POWER_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_POWER_GPIOS_PIN +#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_CONTROLLER +#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_PIN +#define DT_WNCM14A2A_GPIO_MDM_RESET_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_RESET_GPIOS_CONTROLLER +#define DT_WNCM14A2A_GPIO_MDM_RESET_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_RESET_GPIOS_PIN +#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_CONTROLLER +#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_PIN +#ifdef DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN +#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_CONTROLLER +#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN +#endif +#endif + +#if defined(CONFIG_BOARD_NRF52840_PCA10056) || defined(CONFIG_BOARD_NRF52840_MDK) +#define DT_WNCM14A2A_UART_DRV_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_BUS_NAME +#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER +#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN +#define DT_WNCM14A2A_GPIO_MDM_POWER_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_POWER_GPIOS_CONTROLLER +#define DT_WNCM14A2A_GPIO_MDM_POWER_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_POWER_GPIOS_PIN +#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_CONTROLLER +#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_PIN +#define DT_WNCM14A2A_GPIO_MDM_RESET_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_RESET_GPIOS_CONTROLLER +#define DT_WNCM14A2A_GPIO_MDM_RESET_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_RESET_GPIOS_PIN +#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_CONTROLLER +#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_PIN +#ifdef DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN +#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_CONTROLLER +#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN #endif #endif diff --git a/soc/arm/nordic_nrf/nrf52/dts_fixup.h b/soc/arm/nordic_nrf/nrf52/dts_fixup.h index 5f8f1e2c3a1..c360101f339 100644 --- a/soc/arm/nordic_nrf/nrf52/dts_fixup.h +++ b/soc/arm/nordic_nrf/nrf52/dts_fixup.h @@ -148,20 +148,4 @@ #define DT_CC310_IRQ_PRI DT_ARM_CRYPTOCELL_310_5002B000_IRQ_0_PRIORITY #endif -#define DT_WNCM14A2A_UART_DRV_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_BUS_NAME -#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER -#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN -#define DT_WNCM14A2A_GPIO_MDM_POWER_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_POWER_GPIOS_CONTROLLER -#define DT_WNCM14A2A_GPIO_MDM_POWER_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_POWER_GPIOS_PIN -#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_CONTROLLER -#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_PIN -#define DT_WNCM14A2A_GPIO_MDM_RESET_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_RESET_GPIOS_CONTROLLER -#define DT_WNCM14A2A_GPIO_MDM_RESET_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_RESET_GPIOS_PIN -#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_CONTROLLER -#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_PIN -#ifdef DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN -#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_CONTROLLER -#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN -#endif - /* End of SoC Level DTS fixup file */