diff --git a/arch/Kconfig b/arch/Kconfig index bd95979a29d..86a0e62c41b 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -1084,3 +1084,10 @@ config ARCH_CPU_IDLE_CUSTOM help This options allows applications to override the default arch idle implementation with a custom one. + +config ARCH_CPU_ATOMIC_IDLE_CUSTOM + bool "Custom arch_cpu_atomic_idle implementation" + default n + help + This options allows applications to override the default arch idle implementation with + a custom one. diff --git a/arch/arc/core/cpu_idle.S b/arch/arc/core/cpu_idle.S index a5996a2ca4b..797aff870ca 100644 --- a/arch/arc/core/cpu_idle.S +++ b/arch/arc/core/cpu_idle.S @@ -26,6 +26,7 @@ SECTION_VAR(BSS, z_arc_cpu_sleep_mode) .align 4 .word 0 +#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM /* * @brief Put the CPU in low-power mode * @@ -48,7 +49,9 @@ SECTION_FUNC(TEXT, arch_cpu_idle) sleep r1 j_s [blink] nop +#endif +#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM /* * @brief Put the CPU in low-power mode, entered with IRQs locked * @@ -56,6 +59,7 @@ SECTION_FUNC(TEXT, arch_cpu_idle) * * void arch_cpu_atomic_idle(unsigned int key) */ + SECTION_FUNC(TEXT, arch_cpu_atomic_idle) #ifdef CONFIG_TRACING @@ -70,3 +74,4 @@ SECTION_FUNC(TEXT, arch_cpu_atomic_idle) sleep r1 j_s.d [blink] seti r0 +#endif diff --git a/arch/arm/core/cortex_a_r/cpu_idle.S b/arch/arm/core/cortex_a_r/cpu_idle.S index 5c6ef3f12ed..38168a5eae9 100644 --- a/arch/arm/core/cortex_a_r/cpu_idle.S +++ b/arch/arm/core/cortex_a_r/cpu_idle.S @@ -49,6 +49,7 @@ _skip_\@: #endif /* CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK */ .endm +#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM SECTION_FUNC(TEXT, arch_cpu_idle) #ifdef CONFIG_TRACING push {r0, lr} @@ -68,6 +69,9 @@ SECTION_FUNC(TEXT, arch_cpu_idle) bx lr +#endif + +#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM SECTION_FUNC(TEXT, arch_cpu_atomic_idle) #ifdef CONFIG_TRACING push {r0, lr} @@ -93,3 +97,4 @@ SECTION_FUNC(TEXT, arch_cpu_atomic_idle) _irq_disabled: bx lr +#endif diff --git a/arch/arm/core/cortex_m/cpu_idle.c b/arch/arm/core/cortex_m/cpu_idle.c index 4df091fbbd6..3b48b19a003 100644 --- a/arch/arm/core/cortex_m/cpu_idle.c +++ b/arch/arm/core/cortex_m/cpu_idle.c @@ -53,6 +53,7 @@ void z_arm_cpu_idle_init(void) } while (false) #endif +#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM void arch_cpu_idle(void) { #if defined(CONFIG_TRACING) @@ -96,7 +97,9 @@ void arch_cpu_idle(void) __enable_irq(); __ISB(); } +#endif +#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM void arch_cpu_atomic_idle(unsigned int key) { #if defined(CONFIG_TRACING) @@ -135,3 +138,4 @@ void arch_cpu_atomic_idle(unsigned int key) __enable_irq(); #endif } +#endif diff --git a/arch/arm64/core/cpu_idle.S b/arch/arm64/core/cpu_idle.S index e01881ed58d..a8c5bca49be 100644 --- a/arch/arm64/core/cpu_idle.S +++ b/arch/arm64/core/cpu_idle.S @@ -13,7 +13,7 @@ #include _ASM_FILE_PROLOGUE - +#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM GTEXT(arch_cpu_idle) SECTION_FUNC(TEXT, arch_cpu_idle) #ifdef CONFIG_TRACING @@ -25,7 +25,9 @@ SECTION_FUNC(TEXT, arch_cpu_idle) wfi msr daifclr, #(DAIFCLR_IRQ_BIT) ret +#endif +#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM GTEXT(arch_cpu_atomic_idle) SECTION_FUNC(TEXT, arch_cpu_atomic_idle) #ifdef CONFIG_TRACING @@ -41,3 +43,5 @@ SECTION_FUNC(TEXT, arch_cpu_atomic_idle) msr daifclr, #(DAIFCLR_IRQ_BIT) _irq_disabled: ret + +#endif diff --git a/arch/mips/core/cpu_idle.c b/arch/mips/core/cpu_idle.c index d91a6b3ce4b..51b53248c90 100644 --- a/arch/mips/core/cpu_idle.c +++ b/arch/mips/core/cpu_idle.c @@ -19,12 +19,16 @@ static ALWAYS_INLINE void mips_idle(unsigned int key) __asm__ volatile("wait"); } +#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM void arch_cpu_idle(void) { mips_idle(1); } +#endif +#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM void arch_cpu_atomic_idle(unsigned int key) { mips_idle(key); } +#endif diff --git a/arch/nios2/core/cpu_idle.c b/arch/nios2/core/cpu_idle.c index ecdea13f5e4..5678c270f57 100644 --- a/arch/nios2/core/cpu_idle.c +++ b/arch/nios2/core/cpu_idle.c @@ -7,6 +7,7 @@ #include #include +#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM void arch_cpu_idle(void) { /* Do nothing but unconditionally unlock interrupts and return to the @@ -14,7 +15,9 @@ void arch_cpu_idle(void) */ irq_unlock(NIOS2_STATUS_PIE_MSK); } +#endif +#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM void arch_cpu_atomic_idle(unsigned int key) { /* Do nothing but restore IRQ state. This CPU does not have any @@ -22,3 +25,4 @@ void arch_cpu_atomic_idle(unsigned int key) */ irq_unlock(key); } +#endif diff --git a/arch/riscv/core/cpu_idle.c b/arch/riscv/core/cpu_idle.c index 1d47680cef2..5429e5490bc 100644 --- a/arch/riscv/core/cpu_idle.c +++ b/arch/riscv/core/cpu_idle.c @@ -7,16 +7,20 @@ #include #include -void __weak arch_cpu_idle(void) +#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM +void arch_cpu_idle(void) { sys_trace_idle(); __asm__ volatile("wfi"); irq_unlock(MSTATUS_IEN); } +#endif -void __weak arch_cpu_atomic_idle(unsigned int key) +#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM +void arch_cpu_atomic_idle(unsigned int key) { sys_trace_idle(); __asm__ volatile("wfi"); irq_unlock(key); } +#endif diff --git a/arch/x86/core/cpuhalt.c b/arch/x86/core/cpuhalt.c index 77c727bd3f9..47f0381e40e 100644 --- a/arch/x86/core/cpuhalt.c +++ b/arch/x86/core/cpuhalt.c @@ -7,6 +7,7 @@ #include #include +#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM __pinned_func void arch_cpu_idle(void) { @@ -15,7 +16,9 @@ void arch_cpu_idle(void) "sti\n\t" "hlt\n\t"); } +#endif +#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM __pinned_func void arch_cpu_atomic_idle(unsigned int key) { @@ -42,3 +45,4 @@ void arch_cpu_atomic_idle(unsigned int key) __asm__ volatile("cli"); } } +#endif diff --git a/arch/xtensa/core/cpu_idle.c b/arch/xtensa/core/cpu_idle.c index dae79f023ff..13a49603ac0 100644 --- a/arch/xtensa/core/cpu_idle.c +++ b/arch/xtensa/core/cpu_idle.c @@ -14,6 +14,7 @@ void arch_cpu_idle(void) } #endif +#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM void arch_cpu_atomic_idle(unsigned int key) { sys_trace_idle(); @@ -21,3 +22,4 @@ void arch_cpu_atomic_idle(unsigned int key) "wsr.ps %0\n\t" "rsync" :: "a"(key)); } +#endif diff --git a/soc/ite/ec/it8xxx2/Kconfig b/soc/ite/ec/it8xxx2/Kconfig index 74d16b92756..8966b6e2fe6 100644 --- a/soc/ite/ec/it8xxx2/Kconfig +++ b/soc/ite/ec/it8xxx2/Kconfig @@ -4,6 +4,8 @@ config SOC_SERIES_IT8XXX2 select CPU_HAS_FPU if "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "zephyr" || RISCV_ISA_EXT_M select HAS_PM + select ARCH_CPU_IDLE_CUSTOM + select ARCH_CPU_ATOMIC_IDLE_CUSTOM if SOC_SERIES_IT8XXX2 diff --git a/soc/nordic/common/vpr/Kconfig b/soc/nordic/common/vpr/Kconfig index 0c60b8a8b1c..76edb345ece 100644 --- a/soc/nordic/common/vpr/Kconfig +++ b/soc/nordic/common/vpr/Kconfig @@ -18,6 +18,7 @@ config RISCV_CORE_NORDIC_VPR select RISCV_SOC_CONTEXT_SAVE select HAS_FLASH_LOAD_OFFSET select ARCH_CPU_IDLE_CUSTOM + select ARCH_CPU_ATOMIC_IDLE_CUSTOM select INCLUDE_RESET_VECTOR help Enable support for the RISC-V Nordic VPR core.