diff --git a/dts/arm/st/f1/stm32f103Xe.dtsi b/dts/arm/st/f1/stm32f103Xe.dtsi index 5fd6efdc218..fc930a33e30 100644 --- a/dts/arm/st/f1/stm32f103Xe.dtsi +++ b/dts/arm/st/f1/stm32f103Xe.dtsi @@ -29,6 +29,15 @@ label = "UART_4"; }; + uart5: serial@40005000 { + compatible = "st,stm32-uart"; + reg = <0x40005000 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>; + interrupts = <53 0>; + status = "disabled"; + label = "UART_5"; + }; + timers5: timers@40000c00 { compatible = "st,stm32-timers"; reg = <0x40000c00 0x400>; diff --git a/dts/arm/st/f1/stm32f107.dtsi b/dts/arm/st/f1/stm32f107.dtsi index 923290cf23a..319bcb10e38 100644 --- a/dts/arm/st/f1/stm32f107.dtsi +++ b/dts/arm/st/f1/stm32f107.dtsi @@ -17,6 +17,15 @@ label = "UART_4"; }; + uart5: serial@40005000 { + compatible = "st,stm32-uart"; + reg = <0x40005000 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>; + interrupts = <53 0>; + status = "disabled"; + label = "UART_5"; + }; + timers5: timers@40000c00 { compatible = "st,stm32-timers"; reg = <0x40000c00 0x400>; diff --git a/soc/arm/st_stm32/stm32f1/dts_fixup.h b/soc/arm/st_stm32/stm32f1/dts_fixup.h index bda101d96a2..43699e35c0a 100644 --- a/soc/arm/st_stm32/stm32f1/dts_fixup.h +++ b/soc/arm/st_stm32/stm32f1/dts_fixup.h @@ -97,6 +97,14 @@ #define DT_UART_STM32_UART_4_CLOCK_BITS DT_ST_STM32_UART_40004C00_CLOCK_BITS #define DT_UART_STM32_UART_4_CLOCK_BUS DT_ST_STM32_UART_40004C00_CLOCK_BUS +#define DT_UART_STM32_UART_5_BASE_ADDRESS DT_ST_STM32_UART_40005000_BASE_ADDRESS +#define DT_UART_STM32_UART_5_BAUD_RATE DT_ST_STM32_UART_40005000_CURRENT_SPEED +#define DT_UART_STM32_UART_5_IRQ_PRI DT_ST_STM32_UART_40005000_IRQ_0_PRIORITY +#define DT_UART_STM32_UART_5_NAME DT_ST_STM32_UART_40005000_LABEL +#define DT_UART_5_IRQ DT_ST_STM32_UART_40005000_IRQ_0 +#define DT_UART_STM32_UART_5_CLOCK_BITS DT_ST_STM32_UART_40005000_CLOCK_BITS +#define DT_UART_STM32_UART_5_CLOCK_BUS DT_ST_STM32_UART_40005000_CLOCK_BUS + #define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005400_BASE_ADDRESS #define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT_PRIORITY #define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR_PRIORITY