From 7f42dbaf48b90d82ac7cee18ea557b82be47d60b Mon Sep 17 00:00:00 2001 From: Andy Ross Date: Fri, 4 Jan 2019 12:47:21 -0800 Subject: [PATCH] kernel: Add CONFIG_SWAP_NONATOMIC flag On ARM, _Swap() isn't atomic and a hardware interrupt can land after the (irq_locked) caller has entered _Swap() but before the context switch actually happens. This will require some platform-specific workarounds in a few places in the scheduler. This commit is just the Kconfig and selection on ARM. Signed-off-by: Andy Ross --- arch/arm/core/Kconfig | 1 + kernel/Kconfig | 12 ++++++++++++ 2 files changed, 13 insertions(+) diff --git a/arch/arm/core/Kconfig b/arch/arm/core/Kconfig index 3f988744752..75c35d65132 100644 --- a/arch/arm/core/Kconfig +++ b/arch/arm/core/Kconfig @@ -23,6 +23,7 @@ config CPU_CORTEX_M select ARCH_HAS_STACK_PROTECTION if ARM_MPU || CPU_CORTEX_M_HAS_SPLIM select ARCH_HAS_USERSPACE if ARM_MPU select ARCH_HAS_NOCACHE_MEMORY_SUPPORT if ARM_MPU && CPU_HAS_ARM_MPU && CPU_CORTEX_M7 + select SWAP_NONATOMIC help This option signifies the use of a CPU of the Cortex-M family. diff --git a/kernel/Kconfig b/kernel/Kconfig index 6463d9e38de..4c49bf63b21 100644 --- a/kernel/Kconfig +++ b/kernel/Kconfig @@ -483,6 +483,18 @@ config ARCH_HAS_CUSTOM_SWAP_TO_MAIN the _main() thread, but instead must do something custom. It must enable this option in that case. +config SWAP_NONATOMIC + bool + help + On some architectures, the _Swap() primitive cannot be made + atomic with respect to the irq_lock being released. That + is, interrupts may be received between the entry to _Swap + and the completion of the context switch. There are a + handful of workaround cases in the kernel that need to be + enabled when this is true. Currently, this only happens on + ARM when the PendSV exception priority sits below that of + Zephyr-handled interrupts. + config ARCH_HAS_CUSTOM_BUSY_WAIT bool # hidden