soc: silabs_exx32: Add support for SiLabs efr32mg24 SoC

This commit adds support for Silicon Labs EFR32MG24 SoC.

Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>

soc/arm/silabs_exx32/efr32mg24/Kconfig.defconfig.series

@@ -0,0 +1,26 @@
+# Silicon Labs EFR32MG24 (Mighty Gecko) MCU configuration options
+
+# Copyright (c) 2021 Sateesh Kotapati
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_SERIES_EFR32MG24
+
+config SOC_SERIES
+	default "efr32mg24"
+
+config SOC_PART_NUMBER
+	default "EFR32MG24B310F1536IM48" if SOC_PART_NUMBER_EFR32MG24B310F1536IM48
+
+config NUM_IRQS
+	# must be >= the highest interrupt number used
+	default 75
+
+config PM
+	default n
+
+choice PM_POLICY
+	default PM_POLICY_DEFAULT
+	depends on PM
+endchoice
+
+endif # SOC_SERIES_EFR32MG24

soc/arm/silabs_exx32/efr32mg24/Kconfig.series

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+# Silicon Labs EFR32MG24 (Mighty Gecko) MCU
+
+# Copyright (c) 2021 Sateesh Kotapati
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_EFR32MG24
+	bool "EFR32MG24 Series MCU"
+	select ARM
+	select CPU_CORTEX_M33
+	select CPU_HAS_FPU
+	select CPU_HAS_ARM_MPU
+	select CPU_HAS_ARM_SAU
+	select CPU_CORTEX_M_HAS_DWT
+	select ARMV8_M_DSP
+	select ARM_TRUSTZONE_M
+	select SOC_FAMILY_EXX32
+	select HAS_SILABS_GECKO
+	select HAS_SWO
+	select SOC_GECKO_CMU
+	select SOC_GECKO_EMU
+	select SOC_GECKO_GPIO
+	select SOC_GECKO_DEV_INIT
+	select COUNTER_GECKO_STIMER
+	help
+	  Enable support for EFR32MG24 Mighty Gecko MCU series

soc/arm/silabs_exx32/efr32mg24/Kconfig.soc

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+# Silicon Labs EFR32MG24 (Mighty Gecko) MCU line
+
+# Copyright (c) 2020 TriaGnoSys GmbH
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_PART_NUMBER_EFR32MG24B310F1536IM48
+	bool
+	depends on SOC_SERIES_EFR32MG24

soc/arm/silabs_exx32/efr32mg24/linker.ld

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+/*
+ * Copyright (c) 2021 Sateesh Kotapati
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief Linker command/script file
+ *
+ * This is the linker script for both standard images.
+ */
+
+#include <autoconf.h>
+
+#include <zephyr/arch/arm/aarch32/cortex_m/scripts/linker.ld>

soc/arm/silabs_exx32/efr32mg24/soc.h

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+/*
+ * Copyright (c) 2020 TriaGnoSys GmbH
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief Board configuration macros for the EFR32MG24 SoC
+ *
+ */
+
+#ifndef ZEPHYR_SOC_ARM_SILABS_EXX32_EFR32MG24_SOC_H
+#define ZEPHYR_SOC_ARM_SILABS_EXX32_EFR32MG24_SOC_H
+
+#include <zephyr/sys/util.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <em_common.h>
+
+#include "soc_pinmap.h"
+#include "../common/soc_gpio.h"
+
+/* Add include for DTS generated information */
+#include <zephyr/devicetree.h>
+
+#endif  /* !_ASMLANGUAGE */
+
+#endif  /* ZEPHYR_SOC_ARM_SILABS_EXX32_EFR32MG24_SOC_H */

soc/arm/silabs_exx32/efr32mg24/soc_pinmap.h

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+/*
+ * Copyright (c) 2020 TriaGnoSys GmbH
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/** @file
+ * @brief Silabs EFR32MG24 MCU pin definitions.
+ *
+ * This file contains pin configuration data required by different MCU
+ * modules to correctly configure GPIO controller.
+ */
+
+#ifndef ZEPHYR_SOC_ARM_SILABS_EXX32_EFR32MG24_SOC_PINMAP_H_
+#define ZEPHYR_SOC_ARM_SILABS_EXX32_EFR32MG24_SOC_PINMAP_H_
+
+#include <em_gpio.h>
+
+#ifdef CONFIG_LOG_BACKEND_SWO
+#define PIN_SWO { gpioPortA, 3, gpioModePushPull, 1 }
+#endif  /* CONFIG_LOG_BACKEND_SWO */
+
+#endif  /* ZEPHYR_SOC_ARM_SILABS_EXX32_EFR32MG24_SOC_PINMAP_H_ */